| Message ID | 20221223161835.112079-3-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 4cd90875c7208670d5f0d644c6f618f8aa1efc6f |
| Headers | show |
| Series | [1/4] dt-bindings: phy: qcom,usb-snps-femto-v2: use fallback compatibles | expand |
On 23.12.2022 17:18, Krzysztof Kozlowski wrote: > Add SoC-specific compatible to the USB HS PHY to match other devices and > bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi > index b073e0c63df4..d3c661d7650d 100644 > --- a/arch/arm/boot/dts/qcom-sdx65.dtsi > +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi > @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { > }; > > usb_hsphy: phy@ff4000 { > - compatible = "qcom,usb-snps-hs-7nm-phy"; > + compatible = "qcom,sdx65-usb-hs-phy", > + "qcom,usb-snps-hs-7nm-phy"; Not sure if the newline is necessary, but still: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > reg = <0xff4000 0x120>; > #phy-cells = <0>; > status = "disabled";
On 23/12/2022 17:20, Konrad Dybcio wrote: > > > On 23.12.2022 17:18, Krzysztof Kozlowski wrote: >> Add SoC-specific compatible to the USB HS PHY to match other devices and >> bindings. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >> index b073e0c63df4..d3c661d7650d 100644 >> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >> @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { >> }; >> >> usb_hsphy: phy@ff4000 { >> - compatible = "qcom,usb-snps-hs-7nm-phy"; >> + compatible = "qcom,sdx65-usb-hs-phy", >> + "qcom,usb-snps-hs-7nm-phy"; > Not sure if the newline is necessary, but still: > > Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> It is over 80 - up to 90 - and we still keep 80-limit in coding style. Best regards, Krzysztof
On 24.12.2022 14:12, Krzysztof Kozlowski wrote: > On 23/12/2022 17:20, Konrad Dybcio wrote: >> >> >> On 23.12.2022 17:18, Krzysztof Kozlowski wrote: >>> Add SoC-specific compatible to the USB HS PHY to match other devices and >>> bindings. >>> >>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >>> --- >>> arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> index b073e0c63df4..d3c661d7650d 100644 >>> --- a/arch/arm/boot/dts/qcom-sdx65.dtsi >>> +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi >>> @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { >>> }; >>> >>> usb_hsphy: phy@ff4000 { >>> - compatible = "qcom,usb-snps-hs-7nm-phy"; >>> + compatible = "qcom,sdx65-usb-hs-phy", >>> + "qcom,usb-snps-hs-7nm-phy"; >> Not sure if the newline is necessary, but still: >> >> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> > > It is over 80 - up to 90 - and we still keep 80-limit in coding style. Torvalds said 100 is fine a year a go or so. Konrad > > Best regards, > Krzysztof >
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi index b073e0c63df4..d3c661d7650d 100644 --- a/arch/arm/boot/dts/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom-sdx65.dtsi @@ -219,7 +219,8 @@ blsp1_uart3: serial@831000 { }; usb_hsphy: phy@ff4000 { - compatible = "qcom,usb-snps-hs-7nm-phy"; + compatible = "qcom,sdx65-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; reg = <0xff4000 0x120>; #phy-cells = <0>; status = "disabled";
Add SoC-specific compatible to the USB HS PHY to match other devices and bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/qcom-sdx65.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)