Message ID | 20221226031059.2563165-1-dmitry.baryshkov@linaro.org |
---|---|
Headers | show |
Series | phy: qualcomm: pcie2: register as clock provider | expand |
On Mon, 26 Dec 2022 05:10:57 +0200, Dmitry Baryshkov wrote: > Convert the bindings for the Qualcomm PCIe2 PHY into the YAML format > from the text description. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../bindings/phy/qcom,pcie2-phy.yaml | 87 +++++++++++++++++++ > .../bindings/phy/qcom-pcie2-phy.txt | 42 --------- > 2 files changed, 87 insertions(+), 42 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml > delete mode 100644 Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt > Reviewed-by: Rob Herring <robh@kernel.org>
On Mon, 26 Dec 2022 05:10:56 +0200, Dmitry Baryshkov wrote: > On Qualcomm QCS404 platform the PCIe2 PHY provides PIPE clock to the gcc > (Global Clock Controller). Register the PHY as clock provider. > > Changes since v1: > - Dropped 'phandle to' from supply descriptions in schema (Krzysztof), > - Reordered clock-related property definitions in schema as suggested by > Krzysztof, > - Dropped extra empty line at the end of the schema (reported by > Krzysztof). > > [...] Applied, thanks! [3/3] arm64: dts: qcom: qcs404: register PCIe PHY as a clock provider commit: 977e9262c3542e87b513d4dad4c57b2c85e16c8c Best regards,