| Message ID | 20221216215819.1164973-4-marijn.suijten@somainline.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: qcom: sm6125: Enable APPS SMMU | expand |
On 16.12.2022 22:58, Marijn Suijten wrote: > When enabling the APPS SMMU the mainline driver reconfigures the SMMU > from its bootloader configuration, loosing the stream mapping for (among > which) the SDHCI hardware and breaking its ADMA feature. This feature > can be disabled with: > > sdhci.debug_quirks=0x40 > > But it is of course desired to have this feature enabled and working > through the SMMU. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 347665c2067c..f560499cc0ca 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -468,6 +468,7 @@ sdhc_1: mmc@4744000 { > <&gcc GCC_SDCC1_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x160 0>; > > power-domains = <&rpmpd SM6125_VDDCX>; > > @@ -494,6 +495,7 @@ sdhc_2: mmc@4784000 { > <&gcc GCC_SDCC2_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x180 0>; > > pinctrl-0 = <&sdc2_on_state>; > pinctrl-1 = <&sdc2_off_state>;
On 2022-12-16 22:58:18, Marijn Suijten wrote: > When enabling the APPS SMMU the mainline driver reconfigures the SMMU > from its bootloader configuration, loosing the stream mapping for (among > which) the SDHCI hardware and breaking its ADMA feature. This feature > can be disabled with: > > sdhci.debug_quirks=0x40 > > But it is of course desired to have this feature enabled and working > through the SMMU. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 347665c2067c..f560499cc0ca 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -468,6 +468,7 @@ sdhc_1: mmc@4744000 { > <&gcc GCC_SDCC1_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x160 0>; I'll make the mask 0x0 (same below) in the next revision, please do not apply this patch. - Marijn > power-domains = <&rpmpd SM6125_VDDCX>; > > @@ -494,6 +495,7 @@ sdhc_2: mmc@4784000 { > <&gcc GCC_SDCC2_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x180 0>; > > pinctrl-0 = <&sdc2_on_state>; > pinctrl-1 = <&sdc2_off_state>; > -- > 2.39.0 >
On Fri, Dec 16 2022 at 10:58:18 PM +01:00:00, Marijn Suijten <marijn.suijten@somainline.org> wrote: > When enabling the APPS SMMU the mainline driver reconfigures the SMMU > from its bootloader configuration, loosing the stream mapping for > (among > which) the SDHCI hardware and breaking its ADMA feature. This feature > can be disabled with: > > sdhci.debug_quirks=0x40 > > But it is of course desired to have this feature enabled and working > through the SMMU. > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi > b/arch/arm64/boot/dts/qcom/sm6125.dtsi > index 347665c2067c..f560499cc0ca 100644 > --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi > @@ -468,6 +468,7 @@ sdhc_1: mmc@4744000 { > <&gcc GCC_SDCC1_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x160 0>; > > power-domains = <&rpmpd SM6125_VDDCX>; > > @@ -494,6 +495,7 @@ sdhc_2: mmc@4784000 { > <&gcc GCC_SDCC2_APPS_CLK>, > <&xo_board>; > clock-names = "iface", "core", "xo"; > + iommus = <&apps_smmu 0x180 0>; > > pinctrl-0 = <&sdc2_on_state>; > pinctrl-1 = <&sdc2_off_state>; > -- > 2.39.0 > With 0x0 as mask Reviewed-by: Martin Botka <martin.botka@somainline.org> -Martin
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 347665c2067c..f560499cc0ca 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -468,6 +468,7 @@ sdhc_1: mmc@4744000 { <&gcc GCC_SDCC1_APPS_CLK>, <&xo_board>; clock-names = "iface", "core", "xo"; + iommus = <&apps_smmu 0x160 0>; power-domains = <&rpmpd SM6125_VDDCX>; @@ -494,6 +495,7 @@ sdhc_2: mmc@4784000 { <&gcc GCC_SDCC2_APPS_CLK>, <&xo_board>; clock-names = "iface", "core", "xo"; + iommus = <&apps_smmu 0x180 0>; pinctrl-0 = <&sdc2_on_state>; pinctrl-1 = <&sdc2_off_state>;
When enabling the APPS SMMU the mainline driver reconfigures the SMMU from its bootloader configuration, loosing the stream mapping for (among which) the SDHCI hardware and breaking its ADMA feature. This feature can be disabled with: sdhci.debug_quirks=0x40 But it is of course desired to have this feature enabled and working through the SMMU. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 ++ 1 file changed, 2 insertions(+)