mbox series

[0/6] arm64: dts: qcom: msm8956-loire: SDCard

Message ID 20221214232049.703484-1-marijn.suijten@somainline.org
Headers show
Series arm64: dts: qcom: msm8956-loire: SDCard | expand

Message

Marijn Suijten Dec. 14, 2022, 11:20 p.m. UTC 
Add pinctrl nodes to enable SD Cards to work on the Sony Loire platform,
and define extcon nodes in PMI8950 to feed into the ci-hdrc driver as it
cannot figure out the presence of a USB cable (nor the desired role
based on the ID pin) on its own.  While at it, extend PMI8950 with some
more channels with now-available VADC_ register constants.

Depends on:
- Fix pm8941-misc extcon interrupt dependency assumptions:
  https://lore.kernel.org/linux-arm-msm/20220926113143.40768-1-bryan.odonoghue@linaro.org/
- dt-bindings: iio: qcom-spmi-vadc: Add definitions for USB DP/DM VADCs:
  https://lore.kernel.org/linux-arm-msm/20221111120156.48040-2-angelogioacchino.delregno@collabora.com/

Marijn Suijten (6):
  arm64: dts: qcom: pmi8950: Add USB vbus and id sensing nodes
  arm64: dts: qcom: msm8956-loire: Add usb vbus and id extcons to
    ci-hdrc
  arm64: dts: qcom: pmi8950: Add missing ADC channels
  arm64: dts: qcom: msm8976: Declare and use SDC1 pins
  arm64: dts: qcom: msm8976: Declare and use SDC2 pins
  arm64: dts: qcom: msm8956-loire: Add SD Card Detect to SDC2 pin states

 .../qcom/msm8956-sony-xperia-loire-kugo.dts   |   6 ++
 .../dts/qcom/msm8956-sony-xperia-loire.dtsi   |  25 +++++
 arch/arm64/boot/dts/qcom/msm8976.dtsi         | 100 ++++++++++++++++++
 arch/arm64/boot/dts/qcom/pmi8950.dtsi         |  38 +++++++
 4 files changed, 169 insertions(+)

--
2.39.0

Comments

Marijn Suijten Dec. 14, 2022, 11:45 p.m. UTC | #1 
... and USB support

On 2022-12-15 00:20:43, Marijn Suijten wrote:
> Add pinctrl nodes to enable SD Cards to work on the Sony Loire platform,
> and define extcon nodes in PMI8950 to feed into the ci-hdrc driver as it
> cannot figure out the presence of a USB cable (nor the desired role
> based on the ID pin) on its own.  While at it, extend PMI8950 with some
> more channels with now-available VADC_ register constants.
> 
> Depends on:
> - Fix pm8941-misc extcon interrupt dependency assumptions:
>   https://lore.kernel.org/linux-arm-msm/20220926113143.40768-1-bryan.odonoghue@linaro.org/
> - dt-bindings: iio: qcom-spmi-vadc: Add definitions for USB DP/DM VADCs:
>   https://lore.kernel.org/linux-arm-msm/20221111120156.48040-2-angelogioacchino.delregno@collabora.com/
> 
> Marijn Suijten (6):
>   arm64: dts: qcom: pmi8950: Add USB vbus and id sensing nodes
>   arm64: dts: qcom: msm8956-loire: Add usb vbus and id extcons to
>     ci-hdrc
>   arm64: dts: qcom: pmi8950: Add missing ADC channels
>   arm64: dts: qcom: msm8976: Declare and use SDC1 pins
>   arm64: dts: qcom: msm8976: Declare and use SDC2 pins
>   arm64: dts: qcom: msm8956-loire: Add SD Card Detect to SDC2 pin states
> 
>  .../qcom/msm8956-sony-xperia-loire-kugo.dts   |   6 ++
>  .../dts/qcom/msm8956-sony-xperia-loire.dtsi   |  25 +++++
>  arch/arm64/boot/dts/qcom/msm8976.dtsi         | 100 ++++++++++++++++++
>  arch/arm64/boot/dts/qcom/pmi8950.dtsi         |  38 +++++++
>  4 files changed, 169 insertions(+)
> 
> --
> 2.39.0
>
Konrad Dybcio Dec. 15, 2022, 1:19 p.m. UTC | #2 
On 15.12.2022 00:20, Marijn Suijten wrote:
> These seem to have previously been excluded due to either not residing
> on the test board, and/or lacking VADC_USB_DP/VADC_USB_DM definitions.
> Now that the channel constants are included in dt-bindings, add the
> channels to DT as well.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
>  arch/arm64/boot/dts/qcom/pmi8950.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/pmi8950.dtsi b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
> index 7a857b2f3a5a..42a867685275 100644
> --- a/arch/arm64/boot/dts/qcom/pmi8950.dtsi
> +++ b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
> @@ -69,6 +69,30 @@ adc-chan@d {
>  				qcom,pre-scaling = <1 1>;
>  				label = "chg_temp";
>  			};
> +
> +			adc-chan@e {
> +				reg = <VADC_GND_REF>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "ref_gnd";
> +			};
> +
> +			adc-chan@f {
> +				reg = <VADC_VDD_VADC>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "ref_vdd";
> +			};
> +
> +			adc-chan@43 {
> +				reg = <VADC_USB_DP>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "usb_dp";
> +			};
> +
> +			adc-chan@44 {
> +				reg = <VADC_USB_DM>;
> +				qcom,pre-scaling = <1 1>;
> +				label = "usb_dm";
> +			};
>  		};
>  
>  		pmi8950_mpps: mpps@a000 {
Konrad Dybcio Dec. 15, 2022, 1:19 p.m. UTC | #3 
On 15.12.2022 00:20, Marijn Suijten wrote:
> Add the pinctrl states for SDC1 and use them on sdhc_1.
> 
> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8976.dtsi | 55 +++++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> index 05dcb30b0779..7d4c7548882c 100644
> --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> @@ -508,6 +508,56 @@ tlmm: pinctrl@1000000 {
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
>  
> +			sdc1_off_state: sdc1-off-state {
> +				clk-pins {
> +					pins = "sdc1_clk";
> +					drive-strength = <2>;
> +					bias-disable;
> +				};
> +
> +				cmd-pins {
> +					pins = "sdc1_cmd";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +
> +				data-pins {
> +					pins = "sdc1_data";
> +					drive-strength = <2>;
> +					bias-pull-up;
> +				};
> +
> +				rclk-pins {
> +					pins = "sdc1_rclk";
> +					bias-pull-down;
> +				};
> +			};
> +
> +			sdc1_on_state: sdc1-on-state {
> +				clk-pins {
> +					pins = "sdc1_clk";
> +					drive-strength = <16>;
> +					bias-disable;
> +				};
> +
> +				cmd-pins {
> +					pins = "sdc1_cmd";
> +					drive-strength = <10>;
> +					bias-pull-up;
> +				};
> +
> +				data-pins {
> +					pins = "sdc1_data";
> +					drive-strength = <10>;
> +					bias-pull-up;
> +				};
> +
> +				rclk-pins {
> +					pins = "sdc1_rclk";
> +					bias-pull-down;
> +				};
> +			};
> +
>  			spi1_default: spi0-default-state {
>  				spi-pins {
>  					pins = "gpio0", "gpio1", "gpio3";
> @@ -680,6 +730,11 @@ sdhc_1: mmc@7824000 {
>  				 <&gcc GCC_SDCC1_APPS_CLK>,
>  				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
>  			clock-names = "iface", "core", "xo";
> +
> +			pinctrl-0 = <&sdc1_on_state>;
> +			pinctrl-1 = <&sdc1_off_state>;
> +			pinctrl-names = "default", "sleep";
pinctrl-names usually goes before pinctrl-N

Konrad
> +
>  			status = "disabled";
>  		};
>
Marijn Suijten Dec. 15, 2022, 9 p.m. UTC | #4 
On 2022-12-15 14:19:41, Konrad Dybcio wrote:
> 
> 
> On 15.12.2022 00:20, Marijn Suijten wrote:
> > Add the pinctrl states for SDC1 and use them on sdhc_1.
> > 
> > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> > ---
> >  arch/arm64/boot/dts/qcom/msm8976.dtsi | 55 +++++++++++++++++++++++++++
> >  1 file changed, 55 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > index 05dcb30b0779..7d4c7548882c 100644
> > --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > @@ -508,6 +508,56 @@ tlmm: pinctrl@1000000 {
> >  			interrupt-controller;
> >  			#interrupt-cells = <2>;
> >  
> > +			sdc1_off_state: sdc1-off-state {
> > +				clk-pins {
> > +					pins = "sdc1_clk";
> > +					drive-strength = <2>;
> > +					bias-disable;
> > +				};
> > +
> > +				cmd-pins {
> > +					pins = "sdc1_cmd";
> > +					drive-strength = <2>;
> > +					bias-pull-up;
> > +				};
> > +
> > +				data-pins {
> > +					pins = "sdc1_data";
> > +					drive-strength = <2>;
> > +					bias-pull-up;
> > +				};
> > +
> > +				rclk-pins {
> > +					pins = "sdc1_rclk";
> > +					bias-pull-down;
> > +				};
> > +			};
> > +
> > +			sdc1_on_state: sdc1-on-state {
> > +				clk-pins {
> > +					pins = "sdc1_clk";
> > +					drive-strength = <16>;
> > +					bias-disable;
> > +				};
> > +
> > +				cmd-pins {
> > +					pins = "sdc1_cmd";
> > +					drive-strength = <10>;
> > +					bias-pull-up;
> > +				};
> > +
> > +				data-pins {
> > +					pins = "sdc1_data";
> > +					drive-strength = <10>;
> > +					bias-pull-up;
> > +				};
> > +
> > +				rclk-pins {
> > +					pins = "sdc1_rclk";
> > +					bias-pull-down;
> > +				};
> > +			};
> > +
> >  			spi1_default: spi0-default-state {
> >  				spi-pins {
> >  					pins = "gpio0", "gpio1", "gpio3";
> > @@ -680,6 +730,11 @@ sdhc_1: mmc@7824000 {
> >  				 <&gcc GCC_SDCC1_APPS_CLK>,
> >  				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
> >  			clock-names = "iface", "core", "xo";
> > +
> > +			pinctrl-0 = <&sdc1_on_state>;
> > +			pinctrl-1 = <&sdc1_off_state>;
> > +			pinctrl-names = "default", "sleep";
> pinctrl-names usually goes before pinctrl-N

I thought I had seen them _after_ nowadays, same for reg-names,
phy-names, interrupt-names and clock-names.  What is it?

Regardless, I'd rather keep this consistent across this file (sdc2 also
has it after, same for other *-names) and correct it at once in a
separate patch, if someone really cares.

But really, we should have a checker/autoformatter for these "rules",
instead of all this manual back-and-forth (is this order already set in
stone under Documentation/ or something?).

- Marijn
Marijn Suijten Dec. 15, 2022, 9:02 p.m. UTC | #5 
On 2022-12-15 22:00:12, Marijn Suijten wrote:
> On 2022-12-15 14:19:41, Konrad Dybcio wrote:
> > 
> > 
> > On 15.12.2022 00:20, Marijn Suijten wrote:
> > > Add the pinctrl states for SDC1 and use them on sdhc_1.
> > > 
> > > Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
> > > ---
> > >  arch/arm64/boot/dts/qcom/msm8976.dtsi | 55 +++++++++++++++++++++++++++
> > >  1 file changed, 55 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > > index 05dcb30b0779..7d4c7548882c 100644
> > > --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
> > > @@ -508,6 +508,56 @@ tlmm: pinctrl@1000000 {
> > >  			interrupt-controller;
> > >  			#interrupt-cells = <2>;
> > >  
> > > +			sdc1_off_state: sdc1-off-state {
> > > +				clk-pins {
> > > +					pins = "sdc1_clk";
> > > +					drive-strength = <2>;
> > > +					bias-disable;
> > > +				};
> > > +
> > > +				cmd-pins {
> > > +					pins = "sdc1_cmd";
> > > +					drive-strength = <2>;
> > > +					bias-pull-up;
> > > +				};
> > > +
> > > +				data-pins {
> > > +					pins = "sdc1_data";
> > > +					drive-strength = <2>;
> > > +					bias-pull-up;
> > > +				};
> > > +
> > > +				rclk-pins {
> > > +					pins = "sdc1_rclk";
> > > +					bias-pull-down;
> > > +				};
> > > +			};
> > > +
> > > +			sdc1_on_state: sdc1-on-state {
> > > +				clk-pins {
> > > +					pins = "sdc1_clk";
> > > +					drive-strength = <16>;
> > > +					bias-disable;
> > > +				};
> > > +
> > > +				cmd-pins {
> > > +					pins = "sdc1_cmd";
> > > +					drive-strength = <10>;
> > > +					bias-pull-up;
> > > +				};
> > > +
> > > +				data-pins {
> > > +					pins = "sdc1_data";
> > > +					drive-strength = <10>;
> > > +					bias-pull-up;
> > > +				};
> > > +
> > > +				rclk-pins {
> > > +					pins = "sdc1_rclk";
> > > +					bias-pull-down;
> > > +				};
> > > +			};
> > > +
> > >  			spi1_default: spi0-default-state {
> > >  				spi-pins {
> > >  					pins = "gpio0", "gpio1", "gpio3";
> > > @@ -680,6 +730,11 @@ sdhc_1: mmc@7824000 {
> > >  				 <&gcc GCC_SDCC1_APPS_CLK>,
> > >  				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
> > >  			clock-names = "iface", "core", "xo";
> > > +
> > > +			pinctrl-0 = <&sdc1_on_state>;
> > > +			pinctrl-1 = <&sdc1_off_state>;
> > > +			pinctrl-names = "default", "sleep";
> > pinctrl-names usually goes before pinctrl-N
> 
> I thought I had seen them _after_ nowadays, same for reg-names,
> phy-names, interrupt-names and clock-names.  What is it?
> 
> Regardless, I'd rather keep this consistent across this file (sdc2 also
> has it after, same for other *-names)

Excuse me, I was looking at sm6125 DT while writing this, sdc2 for
msm8976 is introduced _and used by sdhc_2 in a followup patch.

The other points still stand though, everything has -names last.

- Marijn

> and correct it at once in a
> separate patch, if someone really cares.
> 
> But really, we should have a checker/autoformatter for these "rules",
> instead of all this manual back-and-forth (is this order already set in
> stone under Documentation/ or something?).
> 
> - Marijn
Konrad Dybcio Dec. 16, 2022, 12:16 a.m. UTC | #6 
On 15.12.2022 22:02, Marijn Suijten wrote:
> On 2022-12-15 22:00:12, Marijn Suijten wrote:
>> On 2022-12-15 14:19:41, Konrad Dybcio wrote:
>>>
>>>
>>> On 15.12.2022 00:20, Marijn Suijten wrote:
>>>> Add the pinctrl states for SDC1 and use them on sdhc_1.
>>>>
>>>> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
>>>> ---
>>>>  arch/arm64/boot/dts/qcom/msm8976.dtsi | 55 +++++++++++++++++++++++++++
>>>>  1 file changed, 55 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/msm8976.dtsi b/arch/arm64/boot/dts/qcom/msm8976.dtsi
>>>> index 05dcb30b0779..7d4c7548882c 100644
>>>> --- a/arch/arm64/boot/dts/qcom/msm8976.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/msm8976.dtsi
>>>> @@ -508,6 +508,56 @@ tlmm: pinctrl@1000000 {
>>>>  			interrupt-controller;
>>>>  			#interrupt-cells = <2>;
>>>>  
>>>> +			sdc1_off_state: sdc1-off-state {
>>>> +				clk-pins {
>>>> +					pins = "sdc1_clk";
>>>> +					drive-strength = <2>;
>>>> +					bias-disable;
>>>> +				};
>>>> +
>>>> +				cmd-pins {
>>>> +					pins = "sdc1_cmd";
>>>> +					drive-strength = <2>;
>>>> +					bias-pull-up;
>>>> +				};
>>>> +
>>>> +				data-pins {
>>>> +					pins = "sdc1_data";
>>>> +					drive-strength = <2>;
>>>> +					bias-pull-up;
>>>> +				};
>>>> +
>>>> +				rclk-pins {
>>>> +					pins = "sdc1_rclk";
>>>> +					bias-pull-down;
>>>> +				};
>>>> +			};
>>>> +
>>>> +			sdc1_on_state: sdc1-on-state {
>>>> +				clk-pins {
>>>> +					pins = "sdc1_clk";
>>>> +					drive-strength = <16>;
>>>> +					bias-disable;
>>>> +				};
>>>> +
>>>> +				cmd-pins {
>>>> +					pins = "sdc1_cmd";
>>>> +					drive-strength = <10>;
>>>> +					bias-pull-up;
>>>> +				};
>>>> +
>>>> +				data-pins {
>>>> +					pins = "sdc1_data";
>>>> +					drive-strength = <10>;
>>>> +					bias-pull-up;
>>>> +				};
>>>> +
>>>> +				rclk-pins {
>>>> +					pins = "sdc1_rclk";
>>>> +					bias-pull-down;
>>>> +				};
>>>> +			};
>>>> +
>>>>  			spi1_default: spi0-default-state {
>>>>  				spi-pins {
>>>>  					pins = "gpio0", "gpio1", "gpio3";
>>>> @@ -680,6 +730,11 @@ sdhc_1: mmc@7824000 {
>>>>  				 <&gcc GCC_SDCC1_APPS_CLK>,
>>>>  				 <&rpmcc RPM_SMD_XO_CLK_SRC>;
>>>>  			clock-names = "iface", "core", "xo";
>>>> +
>>>> +			pinctrl-0 = <&sdc1_on_state>;
>>>> +			pinctrl-1 = <&sdc1_off_state>;
>>>> +			pinctrl-names = "default", "sleep";
>>> pinctrl-names usually goes before pinctrl-N
>>
>> I thought I had seen them _after_ nowadays, same for reg-names,
>> phy-names, interrupt-names and clock-names.  What is it?
>>
>> Regardless, I'd rather keep this consistent across this file (sdc2 also
>> has it after, same for other *-names)
> 
> Excuse me, I was looking at sm6125 DT while writing this, sdc2 for
> msm8976 is introduced _and used by sdhc_2 in a followup patch.
> 
> The other points still stand though, everything has -names last.
Hm, that's a good point, perhaps we should apply it to pinctrl-
too then. I like this.

Konrad
> 
> - Marijn
> 
>> and correct it at once in a
>> separate patch, if someone really cares.
>>
>> But really, we should have a checker/autoformatter for these "rules",
>> instead of all this manual back-and-forth (is this order already set in
>> stone under Documentation/ or something?).
>>
>> - Marijn