| Message ID | 20221209214523.3484193-1-matthew.gerlach@linux.intel.com |
|---|---|
| Headers | show |
| Series | Enhance definition of DFH and use enhancements for UART driver | expand |
On Fri, Dec 09, 2022 at 01:45:20PM -0800, matthew.gerlach@linux.intel.com wrote: > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 15b670926084..606b4b070c33 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -561,6 +561,109 @@ new DFL feature via UIO direct access, its feature id should be added to the > driver's id_table. > > > +Device Feature Header - Version 0 > +=========================================== > +Version 0 (DFHv0) is the original version of the Device Feature Header. > +The format of DFHv0 is shown below:: > + > + +-----------------------------------------------------------------------+ > + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00 > + +-----------------------------------------------------------------------+ > + |63 GUID_L 0| 0x08 > + +-----------------------------------------------------------------------+ > + |63 GUID_H 0| 0x10 > + +-----------------------------------------------------------------------+ > + > +- Offset 0x00 > + > + * Type - The type of DFH (e.g. FME, AFU, or private feature). > + * DFH VER - The version of the DFH. > + * Rsvd - Currently unused. > + * EOL - Set if this DFH is the end of the Device Feature List (DFL). > + * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list. > + * ID - The ID of the feature if Type is private feature. > + > +- Offset 0x08 > + > + * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). > + > +- Offset 0x10 > + > + * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). > + > + > +Device Feature Header - Version 1 > +=========================================== > +Version 1 (DFHv1) of the Device Feature Header adds the following functionality: > + > +* Provides a standardized mechanism for features to describe parameters/capabilities to software. > +* Standardize the use of a GUID for all DFHv1 types. > +* Decouples the location of the DFH from the register space of the feature itself. > + > +The format of Version 1 of the Device Feature Header (DFH) is shown below:: > + > + +-----------------------------------------------------------------------+ > + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00 > + +-----------------------------------------------------------------------+ > + |63 GUID_L 0| 0x08 > + +-----------------------------------------------------------------------+ > + |63 GUID_H 0| 0x10 > + +-----------------------------------------------------------------------+ > + |63 Reg Address/Offset 1| Rel 0| 0x18 > + +-----------------------------------------------------------------------+ > + |63 Reg Size 32|Params 31|30 Group 16|15 Instance 0| 0x20 > + +-----------------------------------------------------------------------+ > + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| 0x28 > + +-----------------------------------------------------------------------+ > + |63 Parameter Data 0| 0x30 > + +-----------------------------------------------------------------------+ > + > + ... > + > + +-----------------------------------------------------------------------+ > + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| > + +-----------------------------------------------------------------------+ > + |63 Parameter Data 0| > + +-----------------------------------------------------------------------+ > + > +- Offset 0x00 > + > + * Type - The type of DFH (e.g. FME, AFU, or private feature). > + * DFH VER - The version of the DFH. > + * Rsvd - Currently unused. > + * EOL - Set if this DFH is the end of the Device Feature List (DFL). > + * Next - The offset of the next DFH in the DFL from the start of the DFH. > + * ID - The ID of the feature if Type is private feature. > + > +- Offset 0x08 > + > + * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier. > + > +- Offset 0x10 > + > + * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier. > + > +- Offset 0x18 > + > + * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers. > + > +- Offset 0x20 > + > + * Reg Size - Size of feature's register set in bytes. > + * Params - Set if DFH has a list of parameter blocks. > + * Group - Id of group if feature is part of a group. > + * Instance - Id of instance of feature within a group. > + > +- Offset 0x28 if feature has parameters > + > + * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter. > + * Param Version - Version of Param ID. > + * Param ID - ID of parameter. > + > +- Offset 0x30 > + > + * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter. > + > Open discussion > =============== > FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration What about this wording below (including fitting the prose within 80 columns)? ---- >8 ---- diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst index 606b4b070c3321..3d8f8dde6021db 100644 --- a/Documentation/fpga/dfl.rst +++ b/Documentation/fpga/dfl.rst @@ -579,26 +579,30 @@ The format of DFHv0 is shown below:: * Type - The type of DFH (e.g. FME, AFU, or private feature). * DFH VER - The version of the DFH. * Rsvd - Currently unused. - * EOL - Set if this DFH is the end of the Device Feature List (DFL). - * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list. - * ID - The ID of the feature if Type is private feature. + * EOL - Set if the DFH is the end of the Device Feature List (DFL). + * Next - The offset of the next DFH in the DFL from the DFH start. If EOL is + set, Next is the size of MMIO of the last feature in the list. + * ID - The feature ID if Type is private feature. - Offset 0x08 - * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier + (present only if Type is FME or AFU). - Offset 0x10 - * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier + (present only if Type is FME or AFU). Device Feature Header - Version 1 =========================================== Version 1 (DFHv1) of the Device Feature Header adds the following functionality: -* Provides a standardized mechanism for features to describe parameters/capabilities to software. +* Provides a standardized mechanism for features to describe + parameters/capabilities to software. * Standardize the use of a GUID for all DFHv1 types. -* Decouples the location of the DFH from the register space of the feature itself. +* Decouples the DFH location from the register space of the feature itself. The format of Version 1 of the Device Feature Header (DFH) is shown below:: @@ -631,38 +635,43 @@ The format of Version 1 of the Device Feature Header (DFH) is shown below:: * Type - The type of DFH (e.g. FME, AFU, or private feature). * DFH VER - The version of the DFH. * Rsvd - Currently unused. - * EOL - Set if this DFH is the end of the Device Feature List (DFL). - * Next - The offset of the next DFH in the DFL from the start of the DFH. - * ID - The ID of the feature if Type is private feature. + * EOL - Set if the DFH is the end of the Device Feature List (DFL). + * Next - The offset of the next DFH in the DFL from the DFH start. + * ID - The feature ID if Type is private feature. - Offset 0x08 - * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier. + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier. - Offset 0x10 - * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier. + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier. - Offset 0x18 - * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers. + * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits + of a 16-bit aligned absolute address of the feature's registers. Otherwise + the value is the offset from the start of the DFH of the feature's + registers. - Offset 0x20 * Reg Size - Size of feature's register set in bytes. * Params - Set if DFH has a list of parameter blocks. - * Group - Id of group if feature is part of a group. - * Instance - Id of instance of feature within a group. + * Group - ID of group if feature is part of a group. + * Instance - ID of feature instance within a group. - Offset 0x28 if feature has parameters - * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter. + * Next - Offset to the next parameter block in 8 byte words. If EOP set, + the value is size in 8 byte words of last parameter. * Param Version - Version of Param ID. * Param ID - ID of parameter. - Offset 0x30 - * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter. + * Parameter Data - Parameter data whose size and format is defined by + version and ID of the parameter. Open discussion =============== Thanks.
On Sat, 10 Dec 2022, Bagas Sanjaya wrote: > On Fri, Dec 09, 2022 at 01:45:20PM -0800, matthew.gerlach@linux.intel.com wrote: >> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst >> index 15b670926084..606b4b070c33 100644 >> --- a/Documentation/fpga/dfl.rst >> +++ b/Documentation/fpga/dfl.rst >> @@ -561,6 +561,109 @@ new DFL feature via UIO direct access, its feature id should be added to the >> driver's id_table. >> >> >> +Device Feature Header - Version 0 >> +=========================================== >> +Version 0 (DFHv0) is the original version of the Device Feature Header. >> +The format of DFHv0 is shown below:: >> + >> + +-----------------------------------------------------------------------+ >> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00 >> + +-----------------------------------------------------------------------+ >> + |63 GUID_L 0| 0x08 >> + +-----------------------------------------------------------------------+ >> + |63 GUID_H 0| 0x10 >> + +-----------------------------------------------------------------------+ >> + >> +- Offset 0x00 >> + >> + * Type - The type of DFH (e.g. FME, AFU, or private feature). >> + * DFH VER - The version of the DFH. >> + * Rsvd - Currently unused. >> + * EOL - Set if this DFH is the end of the Device Feature List (DFL). >> + * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list. >> + * ID - The ID of the feature if Type is private feature. >> + >> +- Offset 0x08 >> + >> + * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). >> + >> +- Offset 0x10 >> + >> + * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). >> + >> + >> +Device Feature Header - Version 1 >> +=========================================== >> +Version 1 (DFHv1) of the Device Feature Header adds the following functionality: >> + >> +* Provides a standardized mechanism for features to describe parameters/capabilities to software. >> +* Standardize the use of a GUID for all DFHv1 types. >> +* Decouples the location of the DFH from the register space of the feature itself. >> + >> +The format of Version 1 of the Device Feature Header (DFH) is shown below:: >> + >> + +-----------------------------------------------------------------------+ >> + |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 VER 12|11 ID 0| 0x00 >> + +-----------------------------------------------------------------------+ >> + |63 GUID_L 0| 0x08 >> + +-----------------------------------------------------------------------+ >> + |63 GUID_H 0| 0x10 >> + +-----------------------------------------------------------------------+ >> + |63 Reg Address/Offset 1| Rel 0| 0x18 >> + +-----------------------------------------------------------------------+ >> + |63 Reg Size 32|Params 31|30 Group 16|15 Instance 0| 0x20 >> + +-----------------------------------------------------------------------+ >> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| 0x28 >> + +-----------------------------------------------------------------------+ >> + |63 Parameter Data 0| 0x30 >> + +-----------------------------------------------------------------------+ >> + >> + ... >> + >> + +-----------------------------------------------------------------------+ >> + |63 Next 35|34RSV33|EOP32|31 Param Version 16|15 Param ID 0| >> + +-----------------------------------------------------------------------+ >> + |63 Parameter Data 0| >> + +-----------------------------------------------------------------------+ >> + >> +- Offset 0x00 >> + >> + * Type - The type of DFH (e.g. FME, AFU, or private feature). >> + * DFH VER - The version of the DFH. >> + * Rsvd - Currently unused. >> + * EOL - Set if this DFH is the end of the Device Feature List (DFL). >> + * Next - The offset of the next DFH in the DFL from the start of the DFH. >> + * ID - The ID of the feature if Type is private feature. >> + >> +- Offset 0x08 >> + >> + * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier. >> + >> +- Offset 0x10 >> + >> + * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier. >> + >> +- Offset 0x18 >> + >> + * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers. >> + >> +- Offset 0x20 >> + >> + * Reg Size - Size of feature's register set in bytes. >> + * Params - Set if DFH has a list of parameter blocks. >> + * Group - Id of group if feature is part of a group. >> + * Instance - Id of instance of feature within a group. >> + >> +- Offset 0x28 if feature has parameters >> + >> + * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter. >> + * Param Version - Version of Param ID. >> + * Param ID - ID of parameter. >> + >> +- Offset 0x30 >> + >> + * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter. >> + >> Open discussion >> =============== >> FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration > > What about this wording below (including fitting the prose within 80 columns)? The wording you suggest is an improvement. I will include your suggestions. I mistakenly thought that Restructured Text needed list items to be a single line and checkpatch.pl did not flag the long lines. Thanks, Matthew Gerlach > > ---- >8 ---- > diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst > index 606b4b070c3321..3d8f8dde6021db 100644 > --- a/Documentation/fpga/dfl.rst > +++ b/Documentation/fpga/dfl.rst > @@ -579,26 +579,30 @@ The format of DFHv0 is shown below:: > * Type - The type of DFH (e.g. FME, AFU, or private feature). > * DFH VER - The version of the DFH. > * Rsvd - Currently unused. > - * EOL - Set if this DFH is the end of the Device Feature List (DFL). > - * Next - The offset of the next DFH in the DFL from the start of the DFH. If EOL is set, Next is the size of MMIO ofthe last feature in the list. > - * ID - The ID of the feature if Type is private feature. > + * EOL - Set if the DFH is the end of the Device Feature List (DFL). > + * Next - The offset of the next DFH in the DFL from the DFH start. If EOL is > + set, Next is the size of MMIO of the last feature in the list. > + * ID - The feature ID if Type is private feature. > > - Offset 0x08 > > - * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). > + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier > + (present only if Type is FME or AFU). > > - Offset 0x10 > > - * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier (present only if Type is FME or AFU). > + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier > + (present only if Type is FME or AFU). > > > Device Feature Header - Version 1 > =========================================== > Version 1 (DFHv1) of the Device Feature Header adds the following functionality: > > -* Provides a standardized mechanism for features to describe parameters/capabilities to software. > +* Provides a standardized mechanism for features to describe > + parameters/capabilities to software. > * Standardize the use of a GUID for all DFHv1 types. > -* Decouples the location of the DFH from the register space of the feature itself. > +* Decouples the DFH location from the register space of the feature itself. > > The format of Version 1 of the Device Feature Header (DFH) is shown below:: > > @@ -631,38 +635,43 @@ The format of Version 1 of the Device Feature Header (DFH) is shown below:: > * Type - The type of DFH (e.g. FME, AFU, or private feature). > * DFH VER - The version of the DFH. > * Rsvd - Currently unused. > - * EOL - Set if this DFH is the end of the Device Feature List (DFL). > - * Next - The offset of the next DFH in the DFL from the start of the DFH. > - * ID - The ID of the feature if Type is private feature. > + * EOL - Set if the DFH is the end of the Device Feature List (DFL). > + * Next - The offset of the next DFH in the DFL from the DFH start. > + * ID - The feature ID if Type is private feature. > > - Offset 0x08 > > - * GUID_L - Least significant 64 bits of a 128 bit Globally Unique Identifier. > + * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier. > > - Offset 0x10 > > - * GUID_H - Most significant 64 bits of a 128 bit Globally Unique Identifier. > + * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier. > > - Offset 0x18 > > - * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits of a 16 bit aligned absolute address of the feature's registers. If Rel bit is clear, then the value is the offset from the start of the DFH of the feature's registers. > + * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits > + of a 16-bit aligned absolute address of the feature's registers. Otherwise > + the value is the offset from the start of the DFH of the feature's > + registers. > > - Offset 0x20 > > * Reg Size - Size of feature's register set in bytes. > * Params - Set if DFH has a list of parameter blocks. > - * Group - Id of group if feature is part of a group. > - * Instance - Id of instance of feature within a group. > + * Group - ID of group if feature is part of a group. > + * Instance - ID of feature instance within a group. > > - Offset 0x28 if feature has parameters > > - * Next - Offset to the next parameter block in 8 byte words. If EOP set, size in 8 byte words of last parameter. > + * Next - Offset to the next parameter block in 8 byte words. If EOP set, > + the value is size in 8 byte words of last parameter. > * Param Version - Version of Param ID. > * Param ID - ID of parameter. > > - Offset 0x30 > > - * Parameter Data - Parameter data whose size and format is defined by version and ID of the parameter. > + * Parameter Data - Parameter data whose size and format is defined by > + version and ID of the parameter. > > Open discussion > =============== > > Thanks. > > -- > An old man doll... just what I always wanted! - Clara >
On Tue, Dec 13, 2022 at 08:50:25AM -0800, matthew.gerlach@linux.intel.com wrote: > On Sat, 10 Dec 2022, Bagas Sanjaya wrote: > > On Fri, Dec 09, 2022 at 01:45:20PM -0800, matthew.gerlach@linux.intel.com wrote: ... > > > Open discussion > > > =============== > > > FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration > > > > What about this wording below (including fitting the prose within 80 columns)? > > The wording you suggest is an improvement. I will include your suggestions. > I mistakenly thought that Restructured Text needed list items to be a single > line and checkpatch.pl did not flag the long lines. I usually test the output with rst2pdf. You can also try kernel doc script to produce man and HTML and see how they are rendered.
On Tue, 13 Dec 2022, Andy Shevchenko wrote: > On Tue, Dec 13, 2022 at 08:50:25AM -0800, matthew.gerlach@linux.intel.com wrote: >> On Sat, 10 Dec 2022, Bagas Sanjaya wrote: >>> On Fri, Dec 09, 2022 at 01:45:20PM -0800, matthew.gerlach@linux.intel.com wrote: > > ... > >>>> Open discussion >>>> =============== >>>> FME driver exports one ioctl (DFL_FPGA_FME_PORT_PR) for partial reconfiguration >>> >>> What about this wording below (including fitting the prose within 80 columns)? >> >> The wording you suggest is an improvement. I will include your suggestions. >> I mistakenly thought that Restructured Text needed list items to be a single >> line and checkpatch.pl did not flag the long lines. > > I usually test the output with rst2pdf. You can also try kernel doc script to > produce man and HTML and see how they are rendered. I have been using 'make htmldocs' and viewing the output. I will checkout rst2pdf as well. Thanks for the feedback, Matthew Gerlach > > -- > With Best Regards, > Andy Shevchenko > > >
From: Matthew Gerlach <matthew.gerlach@linux.intel.com> This patchset enhances the definition of the Device Feature Header (DFH) used by the Device Feature List (DFL) bus and then uses the new enhancements in a UART driver. The enhancements to the DFH includes the introduction of parameter blocks. Like PCI capabilities, the DFH parameter blocks further describe the hardware to software. In the case of the UART, the parameter blocks provide information for the interrupt, clock frequency, and register layout. Duplication of code parsing of the parameter blocks in multiple DFL drivers is a concern. Using swnodes was considered to help minimize parsing code duplication, but their use did not help the problem. Furthermore the highly changeable nature of FPGAs employing the DFL bus makes the use of swnodes inappropriate. Patch 1 updates the DFL documentation to describe the added functionality to DFH. Patch 2 adds the definitions for DFHv1. Patch 3 adds basic support for DFHv1. It adds functionality to parse parameter blocks and adds the functionality to parse the explicit location of a feature's register set. Patch 4 adds a DFL UART driver that makes use of the new features of DFHv1. Basheer Ahmed Muddebihal (1): fpga: dfl: Add DFHv1 Register Definitions Matthew Gerlach (3): Documentation: fpga: dfl: Add documentation for DFHv1 fpga: dfl: add basic support for DFHv1 tty: serial: 8250: add DFL bus driver for Altera 16550. Documentation/fpga/dfl.rst | 103 +++++++++++++ drivers/fpga/dfl.c | 234 ++++++++++++++++++++++------- drivers/fpga/dfl.h | 41 +++++ drivers/tty/serial/8250/8250_dfl.c | 154 +++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 + include/linux/dfl.h | 4 + 7 files changed, 498 insertions(+), 51 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_dfl.c