Message ID | 20221212133303.39610-2-krzysztof.kozlowski@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | [1/4] arm64: dts: qcom: sc7180: correct SPMI bus address cells | expand |
Quoting Krzysztof Kozlowski (2022-12-12 05:33:00) > The SPMI bus uses two address cells and zero size cells (secoond reg > entry - SPMI_USID - is not the size): > > spmi@c440000: #address-cells:0:0: 2 was expected > > Fixes: 14abf8dfe364 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 448879d3d5cd..7c24c2129800 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4286,8 +4286,8 @@ spmi_bus: spmi@c440000 { interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <0>; interrupt-controller; #interrupt-cells = <4>; };
The SPMI bus uses two address cells and zero size cells (secoond reg entry - SPMI_USID - is not the size): spmi@c440000: #address-cells:0:0: 2 was expected Fixes: 14abf8dfe364 ("arm64: dts: qcom: sc7280: Add SPMI PMIC arbiter device for SC7280") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)