| Message ID | 20221209152343.180139-9-jagan@amarulasolutions.com |
|---|---|
| State | New |
| Headers | show |
| Series | drm: bridge: Add Samsung MIPI DSIM bridge | expand |
On 12/9/22 16:23, Jagan Teki wrote: > In i.MX8M Mini/Nano SoC the DSI Phy requires a MIPI DPHY bit 8M Plus too. > to reset in order to activate the PHY and that can be done via > upstream i.MX8M blk-ctrl driver. > > So, mark the phy get as optional. > > v9, v8, v7, v6, v5, v4, v3, v2: > * none > > v1: > * new patch > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Marek Vasut <marex@denx.de> Hmmmm ... It seems like my comments on v7 of the series, and RBs were dropped ? Please double-check that and reinstate the RBs.
diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index a4379c2ccb77..9adab5d372cc 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1584,7 +1584,7 @@ int samsung_dsim_probe(struct platform_device *pdev) if (IS_ERR(dsi->reg_base)) return PTR_ERR(dsi->reg_base); - dsi->phy = devm_phy_get(dev, "dsim"); + dsi->phy = devm_phy_optional_get(dev, "dsim"); if (IS_ERR(dsi->phy)) { dev_info(dev, "failed to get dsim phy\n"); return PTR_ERR(dsi->phy);
In i.MX8M Mini/Nano SoC the DSI Phy requires a MIPI DPHY bit to reset in order to activate the PHY and that can be done via upstream i.MX8M blk-ctrl driver. So, mark the phy get as optional. v9, v8, v7, v6, v5, v4, v3, v2: * none v1: * new patch Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/gpu/drm/bridge/samsung-dsim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)