Message ID | 20221209170042.71169-3-philmd@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | hw: Move few units out of the target-specific source set | expand |
On 09/12/2022 18.00, Philippe Mathieu-Daudé wrote: > The Goldfish interrupt controller is not target specific. It's also only used by m68k which is only built once, so this does help reducing the compile time ... but I agree, it will be more helpful in the future the more code we move to softmmu_ss instead of specific_ss. > While the Exynos interrupt combiner is only used by the ARM > targets, we can build this device once for all. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > hw/intc/meson.build | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/hw/intc/meson.build b/hw/intc/meson.build > index bcbf22ff51..2ad8648366 100644 > --- a/hw/intc/meson.build > +++ b/hw/intc/meson.build > @@ -13,6 +13,8 @@ softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files( > 'arm_gicv3_redist.c', > )) > softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c')) > +softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_combiner.c')) > +softmmu_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) > softmmu_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c')) > softmmu_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c')) > softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c')) > @@ -33,7 +35,7 @@ specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c')) > specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) > specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) > specific_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c')) > -specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c')) > +specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c')) > specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c')) > specific_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic.c')) > specific_ss.add(when: 'CONFIG_LOONGSON_LIOINTC', if_true: files('loongson_liointc.c')) > @@ -60,7 +62,6 @@ specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('xics_spapr.c', 'spapr_xi > specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) > specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], > if_true: files('spapr_xive_kvm.c')) > -specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) > specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) > specific_ss.add(when: 'CONFIG_NIOS2_VIC', if_true: files('nios2_vic.c')) > specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) Reviewed-by: Thomas Huth <thuth@redhat.com>
On 9/12/22 18:21, Thomas Huth wrote: > On 09/12/2022 18.00, Philippe Mathieu-Daudé wrote: >> The Goldfish interrupt controller is not target specific. > > It's also only used by m68k which is only built once, so this does help > reducing the compile time ... but I agree, it will be more helpful in > the future the more code we move to softmmu_ss instead of specific_ss. And soon MIPS too: https://lore.kernel.org/qemu-devel/20221124212916.723490-4-jiaxun.yang@flygoat.com/ >> While the Exynos interrupt combiner is only used by the ARM >> targets, we can build this device once for all. >> >> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> >> --- >> hw/intc/meson.build | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-)
I suggest to change the subject since you move more than just the omap controller. On 09/12/2022 18.00, Philippe Mathieu-Daudé wrote: > The Goldfish interrupt controller is not target specific. > > While the Exynos interrupt combiner is only used by the ARM > targets, we can build this device once for all. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > hw/intc/meson.build | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/hw/intc/meson.build b/hw/intc/meson.build > index bcbf22ff51..2ad8648366 100644 > --- a/hw/intc/meson.build > +++ b/hw/intc/meson.build > @@ -13,6 +13,8 @@ softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files( > 'arm_gicv3_redist.c', > )) > softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c')) > +softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_combiner.c')) > +softmmu_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) > softmmu_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c')) > softmmu_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c')) > softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c')) > @@ -33,7 +35,7 @@ specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c')) > specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) > specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) > specific_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c')) I think aspeed_vic.c could be moved to softmmu_ss, too? > -specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c')) > +specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c')) I just gave it a try, and it seems like exynos4210_gic.c can be moved to softmmu_ss, too? Did it fail for you? > specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c')) > specific_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic.c')) > specific_ss.add(when: 'CONFIG_LOONGSON_LIOINTC', if_true: files('loongson_liointc.c')) > @@ -60,7 +62,6 @@ specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('xics_spapr.c', 'spapr_xi > specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) > specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], > if_true: files('spapr_xive_kvm.c')) > -specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) > specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) > specific_ss.add(when: 'CONFIG_NIOS2_VIC', if_true: files('nios2_vic.c')) > specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c')) While you're at it, it seems like these could be moved, too: CONFIG_ALLWINNER_A10_PIC / allwinner-a10-pic.c CONFIG_OMAP / omap_intc.c CONFIG_RASPI / bcm2835_ic.c , bcm2836_control.c What do you think? Thomas
diff --git a/hw/intc/meson.build b/hw/intc/meson.build index bcbf22ff51..2ad8648366 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -13,6 +13,8 @@ softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files( 'arm_gicv3_redist.c', )) softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c')) +softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_combiner.c')) +softmmu_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) softmmu_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c')) softmmu_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c')) softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c')) @@ -33,7 +35,7 @@ specific_ss.add(when: 'CONFIG_ARM_GIC_KVM', if_true: files('arm_gic_kvm.c')) specific_ss.add(when: ['CONFIG_ARM_GIC_KVM', 'TARGET_AARCH64'], if_true: files('arm_gicv3_kvm.c', 'arm_gicv3_its_kvm.c')) specific_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_nvic.c')) specific_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c')) -specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c')) +specific_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c')) specific_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_irqmp.c')) specific_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic.c')) specific_ss.add(when: 'CONFIG_LOONGSON_LIOINTC', if_true: files('loongson_liointc.c')) @@ -60,7 +62,6 @@ specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('xics_spapr.c', 'spapr_xi specific_ss.add(when: 'CONFIG_XIVE', if_true: files('xive.c')) specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'], if_true: files('spapr_xive_kvm.c')) -specific_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c')) specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c')) specific_ss.add(when: 'CONFIG_NIOS2_VIC', if_true: files('nios2_vic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
The Goldfish interrupt controller is not target specific. While the Exynos interrupt combiner is only used by the ARM targets, we can build this device once for all. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/intc/meson.build | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)