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[v3,0/2] earlycon: Let users set the clock frequency

Message ID 20221123-serial-clk-v3-0-49c516980ae0@chromium.org
Headers show
Series earlycon: Let users set the clock frequency | expand

Message

Ricardo Ribalda Nov. 24, 2022, 12:39 p.m. UTC
Some platforms, namely AMD Picasso, use non standard uart clocks (48M),
witch makes it impossible to use with earlycon.
    
Let the user select its own frequency.

To: Jonathan Corbet <corbet@lwn.net>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Jiri Slaby <jirislaby@kernel.org>
Cc: linux-doc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-serial@vger.kernel.org
Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>

---
Changes in v3:
- Revert patch to use kstrtouint for baudrate
- Parse the number not the ,number (Thanks Jiri :) )
- Add optional patch to increase the options size
- Link to v2: https://lore.kernel.org/r/20221123-serial-clk-v2-0-9c03ce8940d8@chromium.org

Changes in v2:
- Add a patch to fix handling of baudrate
- Use kstrtouint instead of simple_strtoul
- Link to v1: https://lore.kernel.org/r/20221123-serial-clk-v1-0-1f0554a46ad1@chromium.org

---
Ricardo Ribalda (2):
      earlycon: Let users set the clock frequency
      earlycon: Increase options size

 Documentation/admin-guide/kernel-parameters.txt | 12 +++++++-----
 drivers/tty/serial/earlycon.c                   |  9 ++++++++-
 include/linux/serial_core.h                     |  2 +-
 3 files changed, 16 insertions(+), 7 deletions(-)
---
base-commit: 4312098baf37ee17a8350725e6e0d0e8590252d4
change-id: 20221123-serial-clk-85db701ada57

Best regards,

Comments

Ricardo Ribalda Dec. 2, 2022, 5:24 p.m. UTC | #1
Hi Jiri

is there something else that I am missing here?

Thanks!

On Thu, 24 Nov 2022 at 13:39, Ricardo Ribalda <ribalda@chromium.org> wrote:
>
> Some platforms, namely AMD Picasso, use non standard uart clocks (48M),
> witch makes it impossible to use with earlycon.
>
> Let the user select its own frequency.
>
> Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index a465d5242774..9efb6c3b0486 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -1182,10 +1182,10 @@
>                         specified, the serial port must already be setup and
>                         configured.
>
> -               uart[8250],io,<addr>[,options]
> -               uart[8250],mmio,<addr>[,options]
> -               uart[8250],mmio32,<addr>[,options]
> -               uart[8250],mmio32be,<addr>[,options]
> +               uart[8250],io,<addr>[,options[,uartclk]]
> +               uart[8250],mmio,<addr>[,options[,uartclk]]
> +               uart[8250],mmio32,<addr>[,options[,uartclk]]
> +               uart[8250],mmio32be,<addr>[,options[,uartclk]]
>                 uart[8250],0x<addr>[,options]
>                         Start an early, polled-mode console on the 8250/16550
>                         UART at the specified I/O port or MMIO address.
> @@ -1194,7 +1194,9 @@
>                         If none of [io|mmio|mmio32|mmio32be], <addr> is assumed
>                         to be equivalent to 'mmio'. 'options' are specified
>                         in the same format described for "console=ttyS<n>"; if
> -                       unspecified, the h/w is not initialized.
> +                       unspecified, the h/w is not initialized. 'uartclk' is
> +                       the uart clock frequency; if unspecified, it is set
> +                       to 'BASE_BAUD' * 16.
>
>                 pl011,<addr>
>                 pl011,mmio32,<addr>
> diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
> index a5f380584cda..3a0c88419b6c 100644
> --- a/drivers/tty/serial/earlycon.c
> +++ b/drivers/tty/serial/earlycon.c
> @@ -120,7 +120,13 @@ static int __init parse_options(struct earlycon_device *device, char *options)
>         }
>
>         if (options) {
> +               char *uartclk;
> +
>                 device->baud = simple_strtoul(options, NULL, 0);
> +               uartclk = strchr(options, ',');
> +               if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0)
> +                       pr_warn("[%s] unsupported earlycon uart clkrate option\n",
> +                               options);
>                 length = min(strcspn(options, " ") + 1,
>                              (size_t)(sizeof(device->options)));
>                 strscpy(device->options, options, length);
> @@ -139,7 +145,8 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
>                 buf = NULL;
>
>         spin_lock_init(&port->lock);
> -       port->uartclk = BASE_BAUD * 16;
> +       if (!port->uartclk)
> +               port->uartclk = BASE_BAUD * 16;
>         if (port->mapbase)
>                 port->membase = earlycon_map(port->mapbase, 64);
>
>
> --
> b4 0.11.0-dev-d93f8
Jiri Slaby Dec. 6, 2022, 6:52 a.m. UTC | #2
On 24. 11. 22, 13:39, Ricardo Ribalda wrote:
> Some platforms, namely AMD Picasso, use non standard uart clocks (48M),
> witch makes it impossible to use with earlycon.
> 
> Let the user select its own frequency.
> 
> Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>

Reviewed-by: Jiri Slaby <jirislaby@kernel.org>

> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index a465d5242774..9efb6c3b0486 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -1182,10 +1182,10 @@
>   			specified, the serial port must already be setup and
>   			configured.
>   
> -		uart[8250],io,<addr>[,options]
> -		uart[8250],mmio,<addr>[,options]
> -		uart[8250],mmio32,<addr>[,options]
> -		uart[8250],mmio32be,<addr>[,options]
> +		uart[8250],io,<addr>[,options[,uartclk]]
> +		uart[8250],mmio,<addr>[,options[,uartclk]]
> +		uart[8250],mmio32,<addr>[,options[,uartclk]]
> +		uart[8250],mmio32be,<addr>[,options[,uartclk]]
>   		uart[8250],0x<addr>[,options]
>   			Start an early, polled-mode console on the 8250/16550
>   			UART at the specified I/O port or MMIO address.
> @@ -1194,7 +1194,9 @@
>   			If none of [io|mmio|mmio32|mmio32be], <addr> is assumed
>   			to be equivalent to 'mmio'. 'options' are specified
>   			in the same format described for "console=ttyS<n>"; if
> -			unspecified, the h/w is not initialized.
> +			unspecified, the h/w is not initialized. 'uartclk' is
> +			the uart clock frequency; if unspecified, it is set
> +			to 'BASE_BAUD' * 16.
>   
>   		pl011,<addr>
>   		pl011,mmio32,<addr>
> diff --git a/drivers/tty/serial/earlycon.c b/drivers/tty/serial/earlycon.c
> index a5f380584cda..3a0c88419b6c 100644
> --- a/drivers/tty/serial/earlycon.c
> +++ b/drivers/tty/serial/earlycon.c
> @@ -120,7 +120,13 @@ static int __init parse_options(struct earlycon_device *device, char *options)
>   	}
>   
>   	if (options) {
> +		char *uartclk;
> +
>   		device->baud = simple_strtoul(options, NULL, 0);
> +		uartclk = strchr(options, ',');
> +		if (uartclk && kstrtouint(uartclk + 1, 0, &port->uartclk) < 0)
> +			pr_warn("[%s] unsupported earlycon uart clkrate option\n",
> +				options);
>   		length = min(strcspn(options, " ") + 1,
>   			     (size_t)(sizeof(device->options)));
>   		strscpy(device->options, options, length);
> @@ -139,7 +145,8 @@ static int __init register_earlycon(char *buf, const struct earlycon_id *match)
>   		buf = NULL;
>   
>   	spin_lock_init(&port->lock);
> -	port->uartclk = BASE_BAUD * 16;
> +	if (!port->uartclk)
> +		port->uartclk = BASE_BAUD * 16;
>   	if (port->mapbase)
>   		port->membase = earlycon_map(port->mapbase, 64);
>   
>
Greg Kroah-Hartman Dec. 12, 2022, 1:39 p.m. UTC | #3
On Fri, Dec 02, 2022 at 06:24:19PM +0100, Ricardo Ribalda wrote:
> Hi Jiri
> 
> is there something else that I am missing here?

Sorry, been busy with other reviews.  I will queue this up after 6.2-rc1
is out, thanks.

greg k-h