| Message ID | 20221101141658.3631342-3-andre.przywara@arm.com |
|---|---|
| State | Accepted |
| Commit | 77eac2b9e1d86f1abef3cba4fee54f35e186c954 |
| Headers | show |
| Series | ARM: dts: suniv: F1C100s: add more peripherals | expand |
Dne torek, 01. november 2022 ob 15:16:51 CET je Andre Przywara napisal(a): > The Allwinner F1C100s family of SoCs contain a PWM controller compatible > to the one used in the A20 chip. > Add the DT node so that any users can simply enable it in their board > DT. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arch/arm/boot/dts/suniv-f1c100s.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi > b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 0edc1724407b3..d5a6324e76465 > 100644 > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi > @@ -192,6 +192,15 @@ wdt: watchdog@1c20ca0 { > clocks = <&osc32k>; > }; > > + pwm: pwm@1c21000 { > + compatible = "allwinner,suniv-f1c100s-pwm", > + "allwinner,sun7i-a20-pwm"; > + reg = <0x01c21000 0xc>; According to documentation, size is 0x400. Best regards, Jernej > + clocks = <&osc24M>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > uart0: serial@1c25000 { > compatible = "snps,dw-apb-uart"; > reg = <0x01c25000 0x400>;
On Thu, 17 Nov 2022 13:03:50 +0100 Uwe Kleine-König <u.kleine-koenig@pengutronix.de> wrote: Hi Uwe, > On Tue, Nov 01, 2022 at 02:16:51PM +0000, Andre Przywara wrote: > > The Allwinner F1C100s family of SoCs contain a PWM controller compatible > > to the one used in the A20 chip. > > Add the DT node so that any users can simply enable it in their board > > DT. > > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > > I assume this patch will go via an architecture tree (i.e. not PWM). Yes, still the same as in the v2 that you already acked ;-) In fact the patches are in today's -next already. Cheers, Andre
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 0edc1724407b3..d5a6324e76465 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -192,6 +192,15 @@ wdt: watchdog@1c20ca0 { clocks = <&osc32k>; }; + pwm: pwm@1c21000 { + compatible = "allwinner,suniv-f1c100s-pwm", + "allwinner,sun7i-a20-pwm"; + reg = <0x01c21000 0xc>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; + }; + uart0: serial@1c25000 { compatible = "snps,dw-apb-uart"; reg = <0x01c25000 0x400>;
The Allwinner F1C100s family of SoCs contain a PWM controller compatible to the one used in the A20 chip. Add the DT node so that any users can simply enable it in their board DT. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/boot/dts/suniv-f1c100s.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)