diff mbox series

[v1,2/2] ufs: mtk-host: Add MCQ feature

Message ID 20221026073943.22111-3-eddie.huang@mediatek.com
State New
Headers show
Series Add Mediatek UFS Multi Circular Queue | expand

Commit Message

Eddie Huang (黃智傑) Oct. 26, 2022, 7:39 a.m. UTC 
Add Mediatek mcq resource and runtime configuration function
to support MCQ capability

Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 37 +++++++++++++++++++++++++++++++++++++
 drivers/ufs/host/ufs-mediatek.h |  7 +++++++
 2 files changed, 44 insertions(+)

Comments

Eddie Huang (黃智傑) Nov. 8, 2022, 7:32 a.m. UTC | #1 
Hi Angelo

Sorry for late due to miss the mail

On Wed, 2022-10-26 at 10:42 +0200, AngeloGioacchino Del Regno wrote:
> Il 26/10/22 09:39, Eddie Huang ha scritto:
> > Add Mediatek mcq resource and runtime configuration function
> > to support MCQ capability
> > 
> > Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
> > ---
> >   drivers/ufs/host/ufs-mediatek.c | 37
> > +++++++++++++++++++++++++++++++++++++
> >   drivers/ufs/host/ufs-mediatek.h |  7 +++++++
> >   2 files changed, 44 insertions(+)
> > 
> > diff --git a/drivers/ufs/host/ufs-mediatek.c
> > b/drivers/ufs/host/ufs-mediatek.c
> > index c958279..3f5fc05 100644
> > --- a/drivers/ufs/host/ufs-mediatek.c
> > +++ b/drivers/ufs/host/ufs-mediatek.c
> 
> ..snip..
> 
> > +
> > +static int ufs_mtk_config_mcq_resource(struct ufs_hba *hba)
> > +{
> > +	hba->mcq_base = hba->mmio_base +
> > +					MCQ_QUEUE_OFFSET(hba-
> > >mcq_capabilities);
> 

This define in UFSHCI4 spec
ADDR(SQATTR0) = UFS_HCI_BASE + QCFGPTR*200h

> This seems to either be an additional usecase that should be
> implemented into the
> API and not in MediaTek drivers, (as in that case I believe MediaTek
> won't be the
> only user of such usecase)... or just a way to avoid adding the MCQ
> iospace to the
> UFS devicetree node.
> 

I can base on next version of UFS MCQ patch [1], and check whether add
new API

[1]: https://www.spinics.net/lists/linux-scsi/msg178322.html

Thanks,
Eddie
diff mbox series

Patch

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index c958279..3f5fc05 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -31,6 +31,8 @@ 
 #define CREATE_TRACE_POINTS
 #include "ufs-mediatek-trace.h"
 
+#define MCQ_QUEUE_OFFSET(c) ((((c) >> 16) & 0xFF) * 0x200)
+
 static const struct ufs_dev_quirk ufs_mtk_dev_fixups[] = {
 	{ .wmanufacturerid = UFS_ANY_VENDOR,
 	  .model = UFS_ANY_MODEL,
@@ -833,6 +835,8 @@  static int ufs_mtk_init(struct ufs_hba *hba)
 
 	host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER);
 
+	hba->caps |= UFSHCD_CAP_MCQ_EN;
+
 	goto out;
 
 out_variant_clear:
@@ -1314,6 +1318,37 @@  static void ufs_mtk_event_notify(struct ufs_hba *hba,
 	trace_ufs_mtk_event(evt, val);
 }
 
+static int ufs_mtk_op_runtime_config(struct ufs_hba *hba)
+{
+	struct ufshcd_mcq_opr_info_t *opr;
+	int i;
+
+	for (i = 0; i < OPR_MAX; i++) {
+		opr = &hba->mcq_opr[i];
+		opr->stride = REG_UFS_MCQ_STRIDE;
+	}
+
+	hba->mcq_opr[OPR_SQD].offset = REG_UFS_MTK_SQD;
+	hba->mcq_opr[OPR_SQIS].offset = REG_UFS_MTK_SQIS;
+	hba->mcq_opr[OPR_CQD].offset = REG_UFS_MTK_CQD;
+	hba->mcq_opr[OPR_CQIS].offset = REG_UFS_MTK_CQIS;
+
+	hba->mcq_opr[OPR_SQD].base = hba->mmio_base + REG_UFS_MTK_SQD;
+	hba->mcq_opr[OPR_SQIS].base = hba->mmio_base + REG_UFS_MTK_SQIS;
+	hba->mcq_opr[OPR_CQD].base = hba->mmio_base + REG_UFS_MTK_CQD;
+	hba->mcq_opr[OPR_CQIS].base = hba->mmio_base + REG_UFS_MTK_CQIS;
+
+	return 0;
+}
+
+static int ufs_mtk_config_mcq_resource(struct ufs_hba *hba)
+{
+	hba->mcq_base = hba->mmio_base +
+					MCQ_QUEUE_OFFSET(hba->mcq_capabilities);
+
+	return 0;
+}
+
 /*
  * struct ufs_hba_mtk_vops - UFS MTK specific variant operations
  *
@@ -1335,6 +1370,8 @@  static const struct ufs_hba_variant_ops ufs_hba_mtk_vops = {
 	.dbg_register_dump   = ufs_mtk_dbg_register_dump,
 	.device_reset        = ufs_mtk_device_reset,
 	.event_notify        = ufs_mtk_event_notify,
+	.op_runtime_config   = ufs_mtk_op_runtime_config,
+	.config_mcq_resource = ufs_mtk_config_mcq_resource,
 };
 
 /**
diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index aa26d41..febf702 100644
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -26,6 +26,13 @@ 
 #define REG_UFS_DEBUG_SEL_B2        0x22D8
 #define REG_UFS_DEBUG_SEL_B3        0x22DC
 
+#define REG_UFS_MTK_SQD             0x2800
+#define REG_UFS_MTK_SQIS            0x2814
+#define REG_UFS_MTK_CQD             0x281C
+#define REG_UFS_MTK_CQIS            0x2824
+
+#define REG_UFS_MCQ_STRIDE          0x30
+
 /*
  * Ref-clk control
  *