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[2/2] hw/arm/boot: Set SCR_EL3.HXEn when booting kernel

Message ID 20221027140207.413084-3-peter.maydell@linaro.org
State Superseded
Headers show
Series hw/arm/boot.c: Set EL3 HXen, vector lengths when direct booting kernel | expand

Commit Message

Peter Maydell Oct. 27, 2022, 2:02 p.m. UTC
When we direct boot a kernel on a CPU which emulates EL3, we need to
set up the EL3 system registers as the Linux kernel documentation
specifies:
     https://www.kernel.org/doc/Documentation/arm64/booting.rst

For CPUs with FEAT_HCX support this includes:
    - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.

but we forgot to do this when implementing FEAT_HCX, which would mean
that a guest trying to access the HCRX_EL2 register would crash.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/boot.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Richard Henderson Oct. 27, 2022, 8:23 p.m. UTC | #1
On 10/28/22 00:02, Peter Maydell wrote:
> When we direct boot a kernel on a CPU which emulates EL3, we need to
> set up the EL3 system registers as the Linux kernel documentation
> specifies:
>       https://www.kernel.org/doc/Documentation/arm64/booting.rst
> 
> For CPUs with FEAT_HCX support this includes:
>      - SCR_EL3.HXEn (bit 38) must be initialised to 0b1.
> 
> but we forgot to do this when implementing FEAT_HCX, which would mean
> that a guest trying to access the HCRX_EL2 register would crash.
> 
> Signed-off-by: Peter Maydell<peter.maydell@linaro.org>
> ---
>   hw/arm/boot.c | 3 +++
>   1 file changed, 3 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 0e4d1e5a816..ddb7b1bdba0 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -769,6 +769,9 @@  static void do_cpu_reset(void *opaque)
                         env->cp15.scr_el3 |= SCR_ENTP2;
                         env->vfp.smcr_el[3] = 0xf;
                     }
+                    if (cpu_isar_feature(aa64_hcx, cpu)) {
+                        env->cp15.scr_el3 |= SCR_HXEN;
+                    }
                     /* AArch64 kernels never boot in secure mode */
                     assert(!info->secure_boot);
                     /* This hook is only supported for AArch32 currently: