mbox

[PULL,00/24] target-arm queue

Message ID 20221020122146.3177980-1-peter.maydell@linaro.org
State Not Applicable
Headers show

Pull-request

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20221020

Message

Peter Maydell Oct. 20, 2022, 12:21 p.m. UTC 
Hi; here's the latest arm pullreq. This is mostly patches from
RTH, plus a couple of other more minor things. Switching to
PCREL is the big one, hopefully should improve performance.

thanks
-- PMM

The following changes since commit 214a8da23651f2472b296b3293e619fd58d9e212:

  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2022-10-18 11:14:31 -0400)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20221020

for you to fetch changes up to 5db899303799e49209016a93289b8694afa1449e:

  hw/ide/microdrive: Use device_cold_reset() for self-resets (2022-10-20 12:11:53 +0100)

----------------------------------------------------------------
target-arm queue:
 * Switch to TARGET_TB_PCREL
 * More pagetable-walk refactoring preparatory to HAFDBS
 * update the cortex-a15 MIDR to latest rev
 * hw/char/pl011: fix baud rate calculation
 * hw/ide/microdrive: Use device_cold_reset() for self-resets

----------------------------------------------------------------
Alex Bennée (1):
      target/arm: update the cortex-a15 MIDR to latest rev

Baruch Siach (1):
      hw/char/pl011: fix baud rate calculation

Peter Maydell (1):
      hw/ide/microdrive: Use device_cold_reset() for self-resets

Richard Henderson (21):
      target/arm: Enable TARGET_PAGE_ENTRY_EXTRA
      target/arm: Use probe_access_full for MTE
      target/arm: Use probe_access_full for BTI
      target/arm: Add ARMMMUIdx_Phys_{S,NS}
      target/arm: Move ARMMMUIdx_Stage2 to a real tlb mmu_idx
      target/arm: Restrict tlb flush from vttbr_write to vmid change
      target/arm: Split out S1Translate type
      target/arm: Plumb debug into S1Translate
      target/arm: Move be test for regime into S1TranslateResult
      target/arm: Use softmmu tlbs for page table walking
      target/arm: Split out get_phys_addr_twostage
      target/arm: Use bool consistently for get_phys_addr subroutines
      target/arm: Introduce curr_insn_len
      target/arm: Change gen_goto_tb to work on displacements
      target/arm: Change gen_*set_pc_im to gen_*update_pc
      target/arm: Change gen_exception_insn* to work on displacements
      target/arm: Remove gen_exception_internal_insn pc argument
      target/arm: Change gen_jmp* to work on displacements
      target/arm: Introduce gen_pc_plus_diff for aarch64
      target/arm: Introduce gen_pc_plus_diff for aarch32
      target/arm: Enable TARGET_TB_PCREL

 target/arm/cpu-param.h         |  17 +-
 target/arm/cpu.h               |  47 ++--
 target/arm/internals.h         |   1 +
 target/arm/sve_ldst_internal.h |   1 +
 target/arm/translate-a32.h     |   2 +-
 target/arm/translate.h         |  66 ++++-
 hw/char/pl011.c                |   2 +-
 hw/ide/microdrive.c            |   8 +-
 target/arm/cpu.c               |  23 +-
 target/arm/cpu_tcg.c           |   4 +-
 target/arm/helper.c            | 155 +++++++++---
 target/arm/mte_helper.c        |  62 ++---
 target/arm/ptw.c               | 535 +++++++++++++++++++++++++----------------
 target/arm/sve_helper.c        |  54 ++---
 target/arm/tlb_helper.c        |  24 +-
 target/arm/translate-a64.c     | 220 ++++++++++-------
 target/arm/translate-m-nocp.c  |   8 +-
 target/arm/translate-mve.c     |   2 +-
 target/arm/translate-vfp.c     |  10 +-
 target/arm/translate.c         | 284 +++++++++++++---------
 20 files changed, 918 insertions(+), 607 deletions(-)

Comments

Stefan Hajnoczi Oct. 20, 2022, 8:04 p.m. UTC | #1 
Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any user-visible changes.