| Message ID | 20220930082405.1761-3-zhang.lyra@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Convert Unisoc GPIO bindings to yaml and add support for UMS512 | expand |
On 30/09/2022 10:24, Chunyan Zhang wrote: > From: Chunyan Zhang <chunyan.zhang@unisoc.com> > > Convert the Unisoc EIC controller binding to DT schema format. > Update the maxItems of 'reg' property, since the current gpio-eic-sprd > driver supports 3 reg items. Also remove three redundant examples. > > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> > --- > .../bindings/gpio/gpio-eic-sprd.txt | 97 -------------- > .../bindings/gpio/sprd,gpio-eic.yaml | 119 ++++++++++++++++++ > 2 files changed, 119 insertions(+), 97 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > deleted file mode 100644 > index 54040a2bfe3a..000000000000 > --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > +++ /dev/null > @@ -1,97 +0,0 @@ > -Spreadtrum EIC controller bindings > - > -The EIC is the abbreviation of external interrupt controller, which can > -be used only in input mode. The Spreadtrum platform has 2 EIC controllers, > -one is in digital chip, and another one is in PMIC. The digital chip EIC > -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and > -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- > -module. > - > -The EIC-debounce sub-module provides up to 8 source input signal > -connections. A debounce mechanism is used to capture the input signals' > -stable status (millisecond resolution) and a single-trigger mechanism > -is introduced into this sub-module to enhance the input event detection > -reliability. In addition, this sub-module's clock can be shut off > -automatically to reduce power dissipation. Moreover the debounce range > -is from 1ms to 4s with a step size of 1ms. The input signal will be > -ignored if it is asserted for less than 1 ms. > - > -The EIC-latch sub-module is used to latch some special power down signals > -and generate interrupts, since the EIC-latch does not depend on the APB > -clock to capture signals. > - > -The EIC-async sub-module uses a 32kHz clock to capture the short signals > -(microsecond resolution) to generate interrupts by level or edge trigger. > - > -The EIC-sync is similar with GPIO's input function, which is a synchronized > -signal input register. It can generate interrupts by level or edge trigger > -when detecting input signals. > - > -Required properties: > -- compatible: Should be one of the following: > - "sprd,sc9860-eic-debounce", > - "sprd,sc9860-eic-latch", > - "sprd,sc9860-eic-async", > - "sprd,sc9860-eic-sync", > - "sprd,sc2731-eic". > -- reg: Define the base and range of the I/O address space containing > - the GPIO controller registers. > -- gpio-controller: Marks the device node as a GPIO controller. > -- #gpio-cells: Should be <2>. The first cell is the gpio number and > - the second cell is used to specify optional parameters. > -- interrupt-controller: Marks the device node as an interrupt controller. > -- #interrupt-cells: Should be <2>. Specifies the number of cells needed > - to encode interrupt source. > -- interrupts: Should be the port interrupt shared by all the gpios. > - > -Example: > - eic_debounce: gpio@40210000 { > - compatible = "sprd,sc9860-eic-debounce"; > - reg = <0 0x40210000 0 0x80>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_latch: gpio@40210080 { > - compatible = "sprd,sc9860-eic-latch"; > - reg = <0 0x40210080 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_async: gpio@402100a0 { > - compatible = "sprd,sc9860-eic-async"; > - reg = <0 0x402100a0 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_sync: gpio@402100c0 { > - compatible = "sprd,sc9860-eic-sync"; > - reg = <0 0x402100c0 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - pmic_eic: gpio@300 { > - compatible = "sprd,sc2731-eic"; > - reg = <0x300>; > - interrupt-parent = <&sc2731_pmic>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > new file mode 100644 > index 000000000000..c288a8dd44c8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2022 Unisoc Inc. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Unisoc EIC controller > + > +maintainers: > + - Orson Zhai <orsonzhai@gmail.com> > + - Baolin Wang <baolin.wang7@gmail.com> > + - Chunyan Zhang <zhang.lyra@gmail.com> > + > +description: > + The EIC is the abbreviation of external interrupt controller, which can > + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, > + one is in digital chip, and another one is in PMIC. The digital chip EIC > + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and > + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- > + module. > + > + The EIC-debounce sub-module provides up to 8 source input signal > + connections. A debounce mechanism is used to capture the input signals' > + stable status (millisecond resolution) and a single-trigger mechanism > + is introduced into this sub-module to enhance the input event detection > + reliability. In addition, this sub-module's clock can be shut off > + automatically to reduce power dissipation. Moreover the debounce range > + is from 1ms to 4s with a step size of 1ms. The input signal will be > + ignored if it is asserted for less than 1 ms. > + > + The EIC-latch sub-module is used to latch some special power down signals > + and generate interrupts, since the EIC-latch does not depend on the APB > + clock to capture signals. > + > + The EIC-async sub-module uses a 32kHz clock to capture the short signals > + (microsecond resolution) to generate interrupts by level or edge trigger. > + > + The EIC-sync is similar with GPIO's input function, which is a synchronized > + signal input register. It can generate interrupts by level or edge trigger > + when detecting input signals. > + > +properties: > + compatible: > + enum: > + - sprd,sc9860-eic-debounce > + - sprd,sc9860-eic-latch > + - sprd,sc9860-eic-async > + - sprd,sc9860-eic-sync > + - sprd,sc2731-eic > + > + reg: > + minItems: 1 > + maxItems: 3 > + description: > + EIC controller can support maximum 3 banks which has its own > + address base. > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + interrupts: > + maxItems: 1 > + description: > + The interrupt shared by all GPIO lines for this controller. > + > +required: > + - compatible > + - reg > + - gpio-controller > + - "#gpio-cells" > + - interrupt-controller > + - "#interrupt-cells" > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + eic_debounce: gpio@40210000 { > + compatible = "sprd,sc9860-eic-debounce"; > + reg = <0 0x40210000 0 0x80>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > + > + sc2730_pmic { If you insisted to keep it, at least should be correct, so just pmic. > + #address-cells = <1>; > + #size-cells = <0>; > + > + pmic_eic: gpio@300 { It's exactly the same example as above - all same properties. Drop it or bring some differences. Best regards, Krzysztof
On Fri, Sep 30, 2022 at 04:24:04PM +0800, Chunyan Zhang wrote: > From: Chunyan Zhang <chunyan.zhang@unisoc.com> > > Convert the Unisoc EIC controller binding to DT schema format. > Update the maxItems of 'reg' property, since the current gpio-eic-sprd > driver supports 3 reg items. Also remove three redundant examples. > > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> > --- > .../bindings/gpio/gpio-eic-sprd.txt | 97 -------------- > .../bindings/gpio/sprd,gpio-eic.yaml | 119 ++++++++++++++++++ > 2 files changed, 119 insertions(+), 97 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > deleted file mode 100644 > index 54040a2bfe3a..000000000000 > --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > +++ /dev/null > @@ -1,97 +0,0 @@ > -Spreadtrum EIC controller bindings > - > -The EIC is the abbreviation of external interrupt controller, which can > -be used only in input mode. The Spreadtrum platform has 2 EIC controllers, > -one is in digital chip, and another one is in PMIC. The digital chip EIC > -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and > -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- > -module. > - > -The EIC-debounce sub-module provides up to 8 source input signal > -connections. A debounce mechanism is used to capture the input signals' > -stable status (millisecond resolution) and a single-trigger mechanism > -is introduced into this sub-module to enhance the input event detection > -reliability. In addition, this sub-module's clock can be shut off > -automatically to reduce power dissipation. Moreover the debounce range > -is from 1ms to 4s with a step size of 1ms. The input signal will be > -ignored if it is asserted for less than 1 ms. > - > -The EIC-latch sub-module is used to latch some special power down signals > -and generate interrupts, since the EIC-latch does not depend on the APB > -clock to capture signals. > - > -The EIC-async sub-module uses a 32kHz clock to capture the short signals > -(microsecond resolution) to generate interrupts by level or edge trigger. > - > -The EIC-sync is similar with GPIO's input function, which is a synchronized > -signal input register. It can generate interrupts by level or edge trigger > -when detecting input signals. > - > -Required properties: > -- compatible: Should be one of the following: > - "sprd,sc9860-eic-debounce", > - "sprd,sc9860-eic-latch", > - "sprd,sc9860-eic-async", > - "sprd,sc9860-eic-sync", > - "sprd,sc2731-eic". > -- reg: Define the base and range of the I/O address space containing > - the GPIO controller registers. > -- gpio-controller: Marks the device node as a GPIO controller. > -- #gpio-cells: Should be <2>. The first cell is the gpio number and > - the second cell is used to specify optional parameters. > -- interrupt-controller: Marks the device node as an interrupt controller. > -- #interrupt-cells: Should be <2>. Specifies the number of cells needed > - to encode interrupt source. > -- interrupts: Should be the port interrupt shared by all the gpios. > - > -Example: > - eic_debounce: gpio@40210000 { > - compatible = "sprd,sc9860-eic-debounce"; > - reg = <0 0x40210000 0 0x80>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_latch: gpio@40210080 { > - compatible = "sprd,sc9860-eic-latch"; > - reg = <0 0x40210080 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_async: gpio@402100a0 { > - compatible = "sprd,sc9860-eic-async"; > - reg = <0 0x402100a0 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - eic_sync: gpio@402100c0 { > - compatible = "sprd,sc9860-eic-sync"; > - reg = <0 0x402100c0 0 0x20>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - }; > - > - pmic_eic: gpio@300 { > - compatible = "sprd,sc2731-eic"; > - reg = <0x300>; > - interrupt-parent = <&sc2731_pmic>; > - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; > - gpio-controller; > - #gpio-cells = <2>; > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > new file mode 100644 > index 000000000000..c288a8dd44c8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml > @@ -0,0 +1,119 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright 2022 Unisoc Inc. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Unisoc EIC controller > + > +maintainers: > + - Orson Zhai <orsonzhai@gmail.com> > + - Baolin Wang <baolin.wang7@gmail.com> > + - Chunyan Zhang <zhang.lyra@gmail.com> > + > +description: If you want the formatting maintained, you need '|' on the end. > + The EIC is the abbreviation of external interrupt controller, which can > + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, > + one is in digital chip, and another one is in PMIC. The digital chip EIC > + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and > + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- > + module. > + > + The EIC-debounce sub-module provides up to 8 source input signal > + connections. A debounce mechanism is used to capture the input signals' > + stable status (millisecond resolution) and a single-trigger mechanism > + is introduced into this sub-module to enhance the input event detection > + reliability. In addition, this sub-module's clock can be shut off > + automatically to reduce power dissipation. Moreover the debounce range > + is from 1ms to 4s with a step size of 1ms. The input signal will be > + ignored if it is asserted for less than 1 ms. > + > + The EIC-latch sub-module is used to latch some special power down signals > + and generate interrupts, since the EIC-latch does not depend on the APB > + clock to capture signals. > + > + The EIC-async sub-module uses a 32kHz clock to capture the short signals > + (microsecond resolution) to generate interrupts by level or edge trigger. > + > + The EIC-sync is similar with GPIO's input function, which is a synchronized > + signal input register. It can generate interrupts by level or edge trigger > + when detecting input signals. > + > +properties: > + compatible: > + enum: > + - sprd,sc9860-eic-debounce > + - sprd,sc9860-eic-latch > + - sprd,sc9860-eic-async > + - sprd,sc9860-eic-sync > + - sprd,sc2731-eic > + > + reg: > + minItems: 1 > + maxItems: 3 > + description: > + EIC controller can support maximum 3 banks which has its own > + address base. > + > + gpio-controller: true > + > + "#gpio-cells": > + const: 2 > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 > + > + interrupts: > + maxItems: 1 > + description: > + The interrupt shared by all GPIO lines for this controller. > + > +required: > + - compatible > + - reg > + - gpio-controller > + - "#gpio-cells" > + - interrupt-controller > + - "#interrupt-cells" > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + eic_debounce: gpio@40210000 { > + compatible = "sprd,sc9860-eic-debounce"; > + reg = <0 0x40210000 0 0x80>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > + }; > + }; > + > + sc2730_pmic { > + #address-cells = <1>; > + #size-cells = <0>; > + > + pmic_eic: gpio@300 { > + compatible = "sprd,sc2731-eic"; > + reg = <0x300>; > + interrupt-parent = <&sc2731_pmic>; > + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > +... > -- > 2.25.1 > >
On Fri, 30 Sept 2022 at 19:09, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 30/09/2022 10:24, Chunyan Zhang wrote: > > From: Chunyan Zhang <chunyan.zhang@unisoc.com> > > > > Convert the Unisoc EIC controller binding to DT schema format. > > Update the maxItems of 'reg' property, since the current gpio-eic-sprd > > driver supports 3 reg items. Also remove three redundant examples. > > > > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> > > --- > > .../bindings/gpio/gpio-eic-sprd.txt | 97 -------------- > > .../bindings/gpio/sprd,gpio-eic.yaml | 119 ++++++++++++++++++ > > 2 files changed, 119 insertions(+), 97 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt > > create mode 100644 Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml [snip] > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + eic_debounce: gpio@40210000 { > > + compatible = "sprd,sc9860-eic-debounce"; > > + reg = <0 0x40210000 0 0x80>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > > + }; > > + }; > > + > > + sc2730_pmic { > > If you insisted to keep it, at least should be correct, so just pmic. > > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + pmic_eic: gpio@300 { > > It's exactly the same example as above - all same properties. Drop it or > bring some differences. The differences are on #address-cells and #size-cells. Thanks for the review, Chunyan
On 08/10/2022 04:57, Chunyan Zhang wrote: >>> + eic_debounce: gpio@40210000 { >>> + compatible = "sprd,sc9860-eic-debounce"; >>> + reg = <0 0x40210000 0 0x80>; >>> + gpio-controller; >>> + #gpio-cells = <2>; >>> + interrupt-controller; >>> + #interrupt-cells = <2>; >>> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; >>> + }; >>> + }; >>> + >>> + sc2730_pmic { >> >> If you insisted to keep it, at least should be correct, so just pmic. >> >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + pmic_eic: gpio@300 { >> >> It's exactly the same example as above - all same properties. Drop it or >> bring some differences. > > The differences are on #address-cells and #size-cells. > Which don't really matter... Best regards, Krzysztof
On Sun, 9 Oct 2022 at 23:17, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 08/10/2022 04:57, Chunyan Zhang wrote: > >>> + eic_debounce: gpio@40210000 { > >>> + compatible = "sprd,sc9860-eic-debounce"; > >>> + reg = <0 0x40210000 0 0x80>; > >>> + gpio-controller; > >>> + #gpio-cells = <2>; > >>> + interrupt-controller; > >>> + #interrupt-cells = <2>; > >>> + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > >>> + }; > >>> + }; > >>> + > >>> + sc2730_pmic { > >> > >> If you insisted to keep it, at least should be correct, so just pmic. > >> > >>> + #address-cells = <1>; > >>> + #size-cells = <0>; > >>> + > >>> + pmic_eic: gpio@300 { > >> > >> It's exactly the same example as above - all same properties. Drop it or > >> bring some differences. > > > > The differences are on #address-cells and #size-cells. > > > > Which don't really matter... Alright, will drop it in the next version. > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt deleted file mode 100644 index 54040a2bfe3a..000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt +++ /dev/null @@ -1,97 +0,0 @@ -Spreadtrum EIC controller bindings - -The EIC is the abbreviation of external interrupt controller, which can -be used only in input mode. The Spreadtrum platform has 2 EIC controllers, -one is in digital chip, and another one is in PMIC. The digital chip EIC -controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and -EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- -module. - -The EIC-debounce sub-module provides up to 8 source input signal -connections. A debounce mechanism is used to capture the input signals' -stable status (millisecond resolution) and a single-trigger mechanism -is introduced into this sub-module to enhance the input event detection -reliability. In addition, this sub-module's clock can be shut off -automatically to reduce power dissipation. Moreover the debounce range -is from 1ms to 4s with a step size of 1ms. The input signal will be -ignored if it is asserted for less than 1 ms. - -The EIC-latch sub-module is used to latch some special power down signals -and generate interrupts, since the EIC-latch does not depend on the APB -clock to capture signals. - -The EIC-async sub-module uses a 32kHz clock to capture the short signals -(microsecond resolution) to generate interrupts by level or edge trigger. - -The EIC-sync is similar with GPIO's input function, which is a synchronized -signal input register. It can generate interrupts by level or edge trigger -when detecting input signals. - -Required properties: -- compatible: Should be one of the following: - "sprd,sc9860-eic-debounce", - "sprd,sc9860-eic-latch", - "sprd,sc9860-eic-async", - "sprd,sc9860-eic-sync", - "sprd,sc2731-eic". -- reg: Define the base and range of the I/O address space containing - the GPIO controller registers. -- gpio-controller: Marks the device node as a GPIO controller. -- #gpio-cells: Should be <2>. The first cell is the gpio number and - the second cell is used to specify optional parameters. -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells: Should be <2>. Specifies the number of cells needed - to encode interrupt source. -- interrupts: Should be the port interrupt shared by all the gpios. - -Example: - eic_debounce: gpio@40210000 { - compatible = "sprd,sc9860-eic-debounce"; - reg = <0 0x40210000 0 0x80>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_latch: gpio@40210080 { - compatible = "sprd,sc9860-eic-latch"; - reg = <0 0x40210080 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_async: gpio@402100a0 { - compatible = "sprd,sc9860-eic-async"; - reg = <0 0x402100a0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - eic_sync: gpio@402100c0 { - compatible = "sprd,sc9860-eic-sync"; - reg = <0 0x402100c0 0 0x20>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - }; - - pmic_eic: gpio@300 { - compatible = "sprd,sc2731-eic"; - reg = <0x300>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml new file mode 100644 index 000000000000..c288a8dd44c8 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc EIC controller + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: + The EIC is the abbreviation of external interrupt controller, which can + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, + one is in digital chip, and another one is in PMIC. The digital chip EIC + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- + module. + + The EIC-debounce sub-module provides up to 8 source input signal + connections. A debounce mechanism is used to capture the input signals' + stable status (millisecond resolution) and a single-trigger mechanism + is introduced into this sub-module to enhance the input event detection + reliability. In addition, this sub-module's clock can be shut off + automatically to reduce power dissipation. Moreover the debounce range + is from 1ms to 4s with a step size of 1ms. The input signal will be + ignored if it is asserted for less than 1 ms. + + The EIC-latch sub-module is used to latch some special power down signals + and generate interrupts, since the EIC-latch does not depend on the APB + clock to capture signals. + + The EIC-async sub-module uses a 32kHz clock to capture the short signals + (microsecond resolution) to generate interrupts by level or edge trigger. + + The EIC-sync is similar with GPIO's input function, which is a synchronized + signal input register. It can generate interrupts by level or edge trigger + when detecting input signals. + +properties: + compatible: + enum: + - sprd,sc9860-eic-debounce + - sprd,sc9860-eic-latch + - sprd,sc9860-eic-async + - sprd,sc9860-eic-sync + - sprd,sc2731-eic + + reg: + minItems: 1 + maxItems: 3 + description: + EIC controller can support maximum 3 banks which has its own + address base. + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eic_debounce: gpio@40210000 { + compatible = "sprd,sc9860-eic-debounce"; + reg = <0 0x40210000 0 0x80>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + sc2730_pmic { + #address-cells = <1>; + #size-cells = <0>; + + pmic_eic: gpio@300 { + compatible = "sprd,sc2731-eic"; + reg = <0x300>; + interrupt-parent = <&sc2731_pmic>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +...