Message ID | 20220927173702.5200-1-krzysztof.kozlowski@linaro.org |
---|---|
Headers | show |
Series | pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings | expand |
On Tue, 27 Sep 2022 19:36:38 +0200, Krzysztof Kozlowski wrote: > One pinxmux node can have more than 4 pins to configure: > > ['gpio1', 'gpio3', 'gpio4', 'gpio5', 'gpio6', 'gpio7', 'gpio8', 'gpio10', 'gpio11', 'gpio12', 'gpio13', 'gpio14', 'gpio15', 'gpio17'] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, 27 Sep 2022 19:36:46 +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. This method also unifies > the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, 27 Sep 2022 19:36:50 +0200, Krzysztof Kozlowski wrote: > Reference common Qualcomm TLMM pin controller schema, to bring other > regular schemas and additional checks, like function required only for > GPIOs. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > > --- > > v1 was reviewed by Rob, but patch was changed since that time, so not > adding Rob's tag. > --- > .../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, 27 Sep 2022 19:36:54 +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. This method also unifies > the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../bindings/pinctrl/qcom,qcm2290-pinctrl.yaml | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, 27 Sep 2022 19:36:56 +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. > > qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' > > This method also unifies the bindings with other Qualcomm TLMM and LPASS > pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, 27 Sep 2022 19:37:02 +0200, Krzysztof Kozlowski wrote: > Bindings example should be indented with 4-spaces. Previous adjustment > missefd one spot. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> > --- > .../devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Rob Herring <robh@kernel.org>
On Tue, Sep 27, 2022 at 07:36:46PM +0200, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. This method also unifies > the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> > --- > .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml > index e03530091478..b1735918fa90 100644 > --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml > @@ -43,8 +43,9 @@ patternProperties: > oneOf: > - $ref: "#/$defs/qcom-msm8909-tlmm-state" > - patternProperties: > - ".*": > + "-pins$": > $ref: "#/$defs/qcom-msm8909-tlmm-state" > + additionalProperties: false > > $defs: > qcom-msm8909-tlmm-state: > @@ -136,13 +137,13 @@ examples: > }; > > uart-w-subnodes-state { > - rx { > + rx-pins { > pins = "gpio4"; > function = "blsp_uart1"; > bias-pull-up; > }; > > - tx { > + tx-pins { > pins = "gpio5"; > function = "blsp_uart1"; > bias-disable; > -- > 2.34.1 >