[v4,1/3] clk: asm9260: use parent index to link the reference clock

Rewrite clk-asm9260 to use parent index to use the reference clock.
During this rework two helpers are added:

- clk_hw_register_mux_table_parent_data() to supplement
  clk_hw_register_mux_table() but using parent_data instead of
  parent_names

- clk_hw_register_fixed_rate_parent_accuracy() to be used instead of
  directly calling __clk_hw_register_fixed_rate(). The later function is
  an internal API, which is better not to be called directly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/clk-asm9260.c    | 29 ++++++++++++-----------------
 include/linux/clk-provider.h | 21 +++++++++++++++++++++
 2 files changed, 33 insertions(+), 17 deletions(-)

Stephen, gracious ping for the first two patches. They touch the generic 
clk code, so they belong your domain. If they can be merged into 6.1, 
this would save us from the inter-subsys dependency with the PHY patch 
going in into 6.2.

On 16/09/2022 09:17, Dmitry Baryshkov wrote:
> Rewrite clk-asm9260 to use parent index to use the reference clock.
> During this rework two helpers are added:
> 
> - clk_hw_register_mux_table_parent_data() to supplement
>    clk_hw_register_mux_table() but using parent_data instead of
>    parent_names
> 
> - clk_hw_register_fixed_rate_parent_accuracy() to be used instead of
>    directly calling __clk_hw_register_fixed_rate(). The later function is
>    an internal API, which is better not to be called directly.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
>   drivers/clk/clk-asm9260.c    | 29 ++++++++++++-----------------
>   include/linux/clk-provider.h | 21 +++++++++++++++++++++
>   2 files changed, 33 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
> index bacebd457e6f..8b3c059e19a1 100644
> --- a/drivers/clk/clk-asm9260.c
> +++ b/drivers/clk/clk-asm9260.c
> @@ -80,7 +80,7 @@ struct asm9260_mux_clock {
>   	u8			mask;
>   	u32			*table;
>   	const char		*name;
> -	const char		**parent_names;
> +	const struct clk_parent_data *parent_data;
>   	u8			num_parents;
>   	unsigned long		offset;
>   	unsigned long		flags;
> @@ -232,10 +232,10 @@ static const struct asm9260_gate_data asm9260_ahb_gates[] __initconst = {
>   		HW_AHBCLKCTRL1,	16 },
>   };
>   
> -static const char __initdata *main_mux_p[] =   { NULL, NULL };
> -static const char __initdata *i2s0_mux_p[] =   { NULL, NULL, "i2s0m_div"};
> -static const char __initdata *i2s1_mux_p[] =   { NULL, NULL, "i2s1m_div"};
> -static const char __initdata *clkout_mux_p[] = { NULL, NULL, "rtc"};
> +static struct clk_parent_data __initdata main_mux_p[] =   { { .index = 0, }, { .name = "pll" } };
> +static struct clk_parent_data __initdata i2s0_mux_p[] =   { { .index = 0, }, { .name = "pll" }, { .name = "i2s0m_div"} };
> +static struct clk_parent_data __initdata i2s1_mux_p[] =   { { .index = 0, }, { .name = "pll" }, { .name = "i2s1m_div"} };
> +static struct clk_parent_data __initdata clkout_mux_p[] = { { .index = 0, }, { .name = "pll" }, { .name = "rtc"} };
>   static u32 three_mux_table[] = {0, 1, 3};
>   
>   static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
> @@ -255,9 +255,10 @@ static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
>   
>   static void __init asm9260_acc_init(struct device_node *np)
>   {
> -	struct clk_hw *hw;
> +	struct clk_hw *hw, *pll_hw;
>   	struct clk_hw **hws;
> -	const char *ref_clk, *pll_clk = "pll";
> +	const char *pll_clk = "pll";
> +	struct clk_parent_data pll_parent_data = { .index = 0 };
>   	u32 rate;
>   	int n;
>   
> @@ -274,21 +275,15 @@ static void __init asm9260_acc_init(struct device_node *np)
>   	/* register pll */
>   	rate = (ioread32(base + HW_SYSPLLCTRL) & 0xffff) * 1000000;
>   
> -	/* TODO: Convert to DT parent scheme */
> -	ref_clk = of_clk_get_parent_name(np, 0);
> -	hw = __clk_hw_register_fixed_rate(NULL, NULL, pll_clk,
> -			ref_clk, NULL, NULL, 0, rate, 0,
> -			CLK_FIXED_RATE_PARENT_ACCURACY);
> -
> -	if (IS_ERR(hw))
> +	pll_hw = clk_hw_register_fixed_rate_parent_accuracy(NULL, pll_clk, &pll_parent_data,
> +							0, rate);
> +	if (IS_ERR(pll_hw))
>   		panic("%pOFn: can't register REFCLK. Check DT!", np);
>   
>   	for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
>   		const struct asm9260_mux_clock *mc = &asm9260_mux_clks[n];
>   
> -		mc->parent_names[0] = ref_clk;
> -		mc->parent_names[1] = pll_clk;
> -		hw = clk_hw_register_mux_table(NULL, mc->name, mc->parent_names,
> +		hw = clk_hw_register_mux_table_parent_data(NULL, mc->name, mc->parent_data,
>   				mc->num_parents, mc->flags, base + mc->offset,
>   				0, mc->mask, 0, mc->table, &asm9260_clk_lock);
>   	}
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 1615010aa0ec..86140ac2f9a5 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -439,6 +439,20 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
>   	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL,	      \
>   				     (parent_data), NULL, (flags),	      \
>   				     (fixed_rate), (fixed_accuracy), 0)
> +/**
> + * clk_hw_register_fixed_rate_parent_accuracy - register fixed-rate clock with
> + * the clock framework
> + * @dev: device that is registering this clock
> + * @name: name of this clock
> + * @parent_name: name of clock's parent
> + * @flags: framework-specific flags
> + * @fixed_rate: non-adjustable clock rate
> + */
> +#define clk_hw_register_fixed_rate_parent_accuracy(dev, name, parent_data,    \
> +						   flags, fixed_rate)	      \
> +	__clk_hw_register_fixed_rate((dev), NULL, (name), NULL, NULL,      \
> +				     (parent_data), (flags), (fixed_rate), 0,    \
> +				     CLK_FIXED_RATE_PARENT_ACCURACY)
>   
>   void clk_unregister_fixed_rate(struct clk *clk);
>   void clk_hw_unregister_fixed_rate(struct clk_hw *hw);
> @@ -957,6 +971,13 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
>   			      (parent_names), NULL, NULL, (flags), (reg),     \
>   			      (shift), (mask), (clk_mux_flags), (table),      \
>   			      (lock))
> +#define clk_hw_register_mux_table_parent_data(dev, name, parent_data,	      \
> +				  num_parents, flags, reg, shift, mask,	      \
> +				  clk_mux_flags, table, lock)		      \
> +	__clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \
> +			      NULL, NULL, (parent_data), (flags), (reg),      \
> +			      (shift), (mask), (clk_mux_flags), (table),      \
> +			      (lock))
>   #define clk_hw_register_mux(dev, name, parent_names, num_parents, flags, reg, \
>   			    shift, width, clk_mux_flags, lock)		      \
>   	__clk_hw_register_mux((dev), NULL, (name), (num_parents),	      \

Quoting Dmitry Baryshkov (2022-09-15 23:17:38)
> Rewrite clk-asm9260 to use parent index to use the reference clock.
> During this rework two helpers are added:
> 
> - clk_hw_register_mux_table_parent_data() to supplement
>   clk_hw_register_mux_table() but using parent_data instead of
>   parent_names
> 
> - clk_hw_register_fixed_rate_parent_accuracy() to be used instead of
>   directly calling __clk_hw_register_fixed_rate(). The later function is
>   an internal API, which is better not to be called directly.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---

Applied to clk-next