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[v2,00/33] pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings

Message ID 20220926074415.53100-1-krzysztof.kozlowski@linaro.org
Headers show
Series pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings | expand

Message

Krzysztof Kozlowski Sept. 26, 2022, 7:43 a.m. UTC
Hi,

Changes since v1
================
v1: https://lore.kernel.org/linux-devicetree/20220924080459.13084-1-krzysztof.kozlowski@linaro.org/T/#t
1. As Stephan suggested, move check for function on non-GPIO pins to common
   TLMM schema.  This affects few commits in the set named:
   "use common TLMM schema"
   "do not require function on non-GPIOs"

Overview
========
This is the third, independent patchset around Qualcomm pinctrl in recent days:
1. First round of TLMM fixes: merged
2. LPASS fixes:
   https://lore.kernel.org/linux-devicetree/20220922195651.345369-1-krzysztof.kozlowski@linaro.org/T/#t
3. ARMv7 TLMM fixes: *THIS PATCHSET*
4. ARMv8 remaining TLMM fixes: v1 send:
   https://lore.kernel.org/linux-devicetree/20220925110608.145728-1-krzysztof.kozlowski@linaro.org/T/#t

Dependencies
============
1. No dependencies.
2. dt-bindings are independent of DTS patches.

Best regards,
Krzysztof

Krzysztof Kozlowski (33):
  arm64: dts: qcom: ipq6018-cp01-c1: correct blspi1 pins
  arm64: dts: qcom: ipq6018: align TLMM pin configuration with DT schema
  ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
  ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
  ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
  ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
  dt-bindings: pinctrl: qcom,tlmm-common: add common check for function
  dt-bindings: pinctrl: qcom,ipq6018: add qpic_pad function
  dt-bindings: pinctrl: qcom,ipq6018: increase number of pins in pinmux
  dt-bindings: pinctrl: qcom,ipq6018: fix matching pin config
  dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema
  dt-bindings: pinctrl: qcom,ipq6018: fix indentation in example
  dt-bindings: pinctrl: qcom,msm8226: fix matching pin config
  dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
  dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable
  dt-bindings: pinctrl: qcom,msm8226: fix indentation in example
  dt-bindings: pinctrl: qcom,msm8909-tlmm: fix matching pin config
  dt-bindings: pinctrl: qcom,msm8909-tlmm: do not require function on
    non-GPIOs
  dt-bindings: pinctrl: qcom,msm8909-tlmm: fix indentation in example
  dt-bindings: pinctrl: qcom,msm8953: fix matching pin config
  dt-bindings: pinctrl: qcom,msm8953: use common TLMM schema
  dt-bindings: pinctrl: qcom,msm8953: fix indentation in example
  dt-bindings: pinctrl: qcom,mdm9607: do not require function on
    non-GPIOs
  dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example
  dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config
  dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schema
  dt-bindings: pinctrl: qcom,sdx55: fix matching pin config
  dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
  dt-bindings: pinctrl: qcom,sdx55: fix indentation in example
  dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
  dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema
  dt-bindings: pinctrl: qcom,sc7280: fix matching pin config
  dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example
    (remaining piece)

 .../pinctrl/qcom,ipq6018-pinctrl.yaml         | 60 +++++++++--------
 .../pinctrl/qcom,mdm9607-pinctrl.yaml         | 23 ++++---
 .../pinctrl/qcom,msm8226-pinctrl.yaml         | 63 +++++++++---------
 .../bindings/pinctrl/qcom,msm8909-tlmm.yaml   | 64 +++++++++----------
 .../pinctrl/qcom,msm8953-pinctrl.yaml         | 51 ++++++++-------
 .../pinctrl/qcom,qcm2290-pinctrl.yaml         | 11 ++--
 .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++-
 .../pinctrl/qcom,sc8280xp-pinctrl.yaml        |  4 +-
 .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml  | 51 ++++++++-------
 .../bindings/pinctrl/qcom,sdx65-pinctrl.yaml  | 12 ++--
 .../bindings/pinctrl/qcom,tlmm-common.yaml    | 20 ++++--
 arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts   |  6 +-
 arch/arm/boot/dts/qcom-msm8226.dtsi           | 24 +++----
 .../qcom-msm8974-lge-nexus5-hammerhead.dts    | 30 ++++-----
 .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts   | 45 +++++--------
 arch/arm/boot/dts/qcom-sdx55.dtsi             |  1 +
 arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts  |  8 ++-
 arch/arm64/boot/dts/qcom/ipq6018.dtsi         |  4 +-
 18 files changed, 264 insertions(+), 227 deletions(-)

Comments

Bjorn Andersson Sept. 27, 2022, 3:41 a.m. UTC | #1
On Mon, Sep 26, 2022 at 09:43:42AM +0200, Krzysztof Kozlowski wrote:
> Hi,
> 
> Changes since v1
> ================
> v1: https://lore.kernel.org/linux-devicetree/20220924080459.13084-1-krzysztof.kozlowski@linaro.org/T/#t
> 1. As Stephan suggested, move check for function on non-GPIO pins to common
>    TLMM schema.  This affects few commits in the set named:
>    "use common TLMM schema"
>    "do not require function on non-GPIOs"
> 
> Overview
> ========
> This is the third, independent patchset around Qualcomm pinctrl in recent days:
> 1. First round of TLMM fixes: merged
> 2. LPASS fixes:
>    https://lore.kernel.org/linux-devicetree/20220922195651.345369-1-krzysztof.kozlowski@linaro.org/T/#t
> 3. ARMv7 TLMM fixes: *THIS PATCHSET*
> 4. ARMv8 remaining TLMM fixes: v1 send:
>    https://lore.kernel.org/linux-devicetree/20220925110608.145728-1-krzysztof.kozlowski@linaro.org/T/#t
> 
> Dependencies
> ============
> 1. No dependencies.
> 2. dt-bindings are independent of DTS patches.
> 
> Best regards,
> Krzysztof

Reviewed-by: Bjorn Andersson <andersson@kernel.org>

Regards,
Bjorn

> 
> Krzysztof Kozlowski (33):
>   arm64: dts: qcom: ipq6018-cp01-c1: correct blspi1 pins
>   arm64: dts: qcom: ipq6018: align TLMM pin configuration with DT schema
>   ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
>   ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
>   ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
>   ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
>   dt-bindings: pinctrl: qcom,tlmm-common: add common check for function
>   dt-bindings: pinctrl: qcom,ipq6018: add qpic_pad function
>   dt-bindings: pinctrl: qcom,ipq6018: increase number of pins in pinmux
>   dt-bindings: pinctrl: qcom,ipq6018: fix matching pin config
>   dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema
>   dt-bindings: pinctrl: qcom,ipq6018: fix indentation in example
>   dt-bindings: pinctrl: qcom,msm8226: fix matching pin config
>   dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
>   dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable
>   dt-bindings: pinctrl: qcom,msm8226: fix indentation in example
>   dt-bindings: pinctrl: qcom,msm8909-tlmm: fix matching pin config
>   dt-bindings: pinctrl: qcom,msm8909-tlmm: do not require function on
>     non-GPIOs
>   dt-bindings: pinctrl: qcom,msm8909-tlmm: fix indentation in example
>   dt-bindings: pinctrl: qcom,msm8953: fix matching pin config
>   dt-bindings: pinctrl: qcom,msm8953: use common TLMM schema
>   dt-bindings: pinctrl: qcom,msm8953: fix indentation in example
>   dt-bindings: pinctrl: qcom,mdm9607: do not require function on
>     non-GPIOs
>   dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example
>   dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config
>   dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schema
>   dt-bindings: pinctrl: qcom,sdx55: fix matching pin config
>   dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
>   dt-bindings: pinctrl: qcom,sdx55: fix indentation in example
>   dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
>   dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema
>   dt-bindings: pinctrl: qcom,sc7280: fix matching pin config
>   dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example
>     (remaining piece)
> 
>  .../pinctrl/qcom,ipq6018-pinctrl.yaml         | 60 +++++++++--------
>  .../pinctrl/qcom,mdm9607-pinctrl.yaml         | 23 ++++---
>  .../pinctrl/qcom,msm8226-pinctrl.yaml         | 63 +++++++++---------
>  .../bindings/pinctrl/qcom,msm8909-tlmm.yaml   | 64 +++++++++----------
>  .../pinctrl/qcom,msm8953-pinctrl.yaml         | 51 ++++++++-------
>  .../pinctrl/qcom,qcm2290-pinctrl.yaml         | 11 ++--
>  .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++-
>  .../pinctrl/qcom,sc8280xp-pinctrl.yaml        |  4 +-
>  .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml  | 51 ++++++++-------
>  .../bindings/pinctrl/qcom,sdx65-pinctrl.yaml  | 12 ++--
>  .../bindings/pinctrl/qcom,tlmm-common.yaml    | 20 ++++--
>  arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts   |  6 +-
>  arch/arm/boot/dts/qcom-msm8226.dtsi           | 24 +++----
>  .../qcom-msm8974-lge-nexus5-hammerhead.dts    | 30 ++++-----
>  .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts   | 45 +++++--------
>  arch/arm/boot/dts/qcom-sdx55.dtsi             |  1 +
>  arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts  |  8 ++-
>  arch/arm64/boot/dts/qcom/ipq6018.dtsi         |  4 +-
>  18 files changed, 264 insertions(+), 227 deletions(-)
> 
> -- 
> 2.34.1
>
Konrad Dybcio Sept. 27, 2022, 1:10 p.m. UTC | #2
On 26.09.2022 09:43, Krzysztof Kozlowski wrote:
> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
> the device node lacked respective pin configuration assignment.   It
> used also blsp0_spi function but that was probably the same mistake as
> naming it SPI0.
> 
> Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> index 1ba2eca33c7b..afc2dc79767d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> @@ -37,6 +37,8 @@ &blsp1_i2c3 {
>  
>  &blsp1_spi1 {
>  	cs-select = <0>;
> +	pinctrl-0 = <&spi_0_pins>;
> +	pinctrl-names = "default";
>  	status = "okay";
>  
>  	flash@0 {
> @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins {
>  
>  	spi_0_pins: spi-0-pins {
>  		pins = "gpio38", "gpio39", "gpio40", "gpio41";
> -		function = "blsp0_spi";
> +		function = "blsp1_spi";
>  		drive-strength = <8>;
>  		bias-pull-down;
>  	};
Konrad Dybcio Sept. 27, 2022, 1:10 p.m. UTC | #3
On 26.09.2022 09:43, Krzysztof Kozlowski wrote:
> Add required gpio-ranges property to TLMM pinctrl node:
> 
>   qcom-sdx55-mtp.dtb: pinctrl@f100000: 'gpio-ranges' is a required property
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm/boot/dts/qcom-sdx55.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi
> index c72540223fa9..f1c0dab40992 100644
> --- a/arch/arm/boot/dts/qcom-sdx55.dtsi
> +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi
> @@ -559,6 +559,7 @@ tlmm: pinctrl@f100000 {
>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> +			gpio-ranges = <&tlmm 0 0 109>;
>  		};
>  
>  		sram@1468f000 {
Konrad Dybcio Sept. 27, 2022, 1:11 p.m. UTC | #4
On 26.09.2022 09:43, Krzysztof Kozlowski wrote:
> DT schema expects TLMM pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>

Konrad
>  arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts |  6 +++---
>  arch/arm/boot/dts/qcom-msm8226.dtsi         | 24 ++++++++++-----------
>  2 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> index 193569f0ca5f..02bef5870526 100644
> --- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> +++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> @@ -299,8 +299,8 @@ bluetooth_default_state: bluetooth-default-state {
>  		input-enable;
>  	};
>  
> -	touch_pins: touch {
> -		irq {
> +	touch_pins: touch-state {
> +		irq-pins {
>  			pins = "gpio17";
>  			function = "gpio";
>  
> @@ -309,7 +309,7 @@ irq {
>  			input-enable;
>  		};
>  
> -		reset {
> +		reset-pins {
>  			pins = "gpio16";
>  			function = "gpio";
>  
> diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
> index cf2d56929428..3b6e746a4af9 100644
> --- a/arch/arm/boot/dts/qcom-msm8226.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
> @@ -354,35 +354,35 @@ tlmm: pinctrl@fd510000 {
>  			#interrupt-cells = <2>;
>  			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
>  
> -			blsp1_i2c1_pins: blsp1-i2c1 {
> +			blsp1_i2c1_pins: blsp1-i2c1-state {
>  				pins = "gpio2", "gpio3";
>  				function = "blsp_i2c1";
>  				drive-strength = <2>;
>  				bias-disable;
>  			};
>  
> -			blsp1_i2c2_pins: blsp1-i2c2 {
> +			blsp1_i2c2_pins: blsp1-i2c2-state {
>  				pins = "gpio6", "gpio7";
>  				function = "blsp_i2c2";
>  				drive-strength = <2>;
>  				bias-disable;
>  			};
>  
> -			blsp1_i2c3_pins: blsp1-i2c3 {
> +			blsp1_i2c3_pins: blsp1-i2c3-state {
>  				pins = "gpio10", "gpio11";
>  				function = "blsp_i2c3";
>  				drive-strength = <2>;
>  				bias-disable;
>  			};
>  
> -			blsp1_i2c4_pins: blsp1-i2c4 {
> +			blsp1_i2c4_pins: blsp1-i2c4-state {
>  				pins = "gpio14", "gpio15";
>  				function = "blsp_i2c4";
>  				drive-strength = <2>;
>  				bias-disable;
>  			};
>  
> -			blsp1_i2c5_pins: blsp1-i2c5 {
> +			blsp1_i2c5_pins: blsp1-i2c5-state {
>  				pins = "gpio18", "gpio19";
>  				function = "blsp_i2c5";
>  				drive-strength = <2>;
> @@ -390,13 +390,13 @@ blsp1_i2c5_pins: blsp1-i2c5 {
>  			};
>  
>  			sdhc1_default_state: sdhc1-default-state {
> -				clk {
> +				clk-pins {
>  					pins = "sdc1_clk";
>  					drive-strength = <10>;
>  					bias-disable;
>  				};
>  
> -				cmd-data {
> +				cmd-data-pins {
>  					pins = "sdc1_cmd", "sdc1_data";
>  					drive-strength = <10>;
>  					bias-pull-up;
> @@ -404,13 +404,13 @@ cmd-data {
>  			};
>  
>  			sdhc2_default_state: sdhc2-default-state {
> -				clk {
> +				clk-pins {
>  					pins = "sdc2_clk";
>  					drive-strength = <10>;
>  					bias-disable;
>  				};
>  
> -				cmd-data {
> +				cmd-data-pins {
>  					pins = "sdc2_cmd", "sdc2_data";
>  					drive-strength = <10>;
>  					bias-pull-up;
> @@ -418,21 +418,21 @@ cmd-data {
>  			};
>  
>  			sdhc3_default_state: sdhc3-default-state {
> -				clk {
> +				clk-pins {
>  					pins = "gpio44";
>  					function = "sdc3";
>  					drive-strength = <8>;
>  					bias-disable;
>  				};
>  
> -				cmd {
> +				cmd-pins {
>  					pins = "gpio43";
>  					function = "sdc3";
>  					drive-strength = <8>;
>  					bias-pull-up;
>  				};
>  
> -				data {
> +				data-pins {
>  					pins = "gpio39", "gpio40", "gpio41", "gpio42";
>  					function = "sdc3";
>  					drive-strength = <8>;
Robert Marko Sept. 27, 2022, 2:01 p.m. UTC | #5
On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote:
> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
> the device node lacked respective pin configuration assignment.   It
> used also blsp0_spi function but that was probably the same mistake as
> naming it SPI0.

Hi,

Sorry for making it confusing, but "blsp0_spi" is the correct function.
Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT
we call the nodes blsp1-blsp6.

It would probably be better for me to rename the nodes to blsp0-5 instead.

Regards,
Robert

>
> Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>   arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> index 1ba2eca33c7b..afc2dc79767d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
> @@ -37,6 +37,8 @@ &blsp1_i2c3 {
>   
>   &blsp1_spi1 {
>   	cs-select = <0>;
> +	pinctrl-0 = <&spi_0_pins>;
> +	pinctrl-names = "default";
>   	status = "okay";
>   
>   	flash@0 {
> @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins {
>   
>   	spi_0_pins: spi-0-pins {
>   		pins = "gpio38", "gpio39", "gpio40", "gpio41";
> -		function = "blsp0_spi";
> +		function = "blsp1_spi";
>   		drive-strength = <8>;
>   		bias-pull-down;
>   	};
Krzysztof Kozlowski Sept. 27, 2022, 2:33 p.m. UTC | #6
On 27/09/2022 16:01, Robert Marko wrote:
> 
> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote:
>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
>> the device node lacked respective pin configuration assignment.   It
>> used also blsp0_spi function but that was probably the same mistake as
>> naming it SPI0.
> 
> Hi,
> 
> Sorry for making it confusing, but "blsp0_spi" is the correct function.
> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT
> we call the nodes blsp1-blsp6.
> 
> It would probably be better for me to rename the nodes to blsp0-5 instead.

OK, so instead I will add blsp0_spi to the bindings.

Best regards,
Krzysztof
Robert Marko Sept. 27, 2022, 3:20 p.m. UTC | #7
On 27. 09. 2022. 16:33, Krzysztof Kozlowski wrote:
> On 27/09/2022 16:01, Robert Marko wrote:
>> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote:
>>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
>>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
>>> the device node lacked respective pin configuration assignment.   It
>>> used also blsp0_spi function but that was probably the same mistake as
>>> naming it SPI0.
>> Hi,
>>
>> Sorry for making it confusing, but "blsp0_spi" is the correct function.
>> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT
>> we call the nodes blsp1-blsp6.
>>
>> It would probably be better for me to rename the nodes to blsp0-5 instead.
> OK, so instead I will add blsp0_spi to the bindings.

Can you add blsp0_uart and blsp0_i2c as well?
All 6 of the QUP-s have same features.

I am adding MDIO to CP01, so I can add mdc and mdio to bindings
as they are lacking there as well.

Regards,
Robert

>
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Sept. 27, 2022, 3:20 p.m. UTC | #8
On 27/09/2022 17:20, Robert Marko wrote:
> 
> On 27. 09. 2022. 16:33, Krzysztof Kozlowski wrote:
>> On 27/09/2022 16:01, Robert Marko wrote:
>>> On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote:
>>>> When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
>>>> ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
>>>> the device node lacked respective pin configuration assignment.   It
>>>> used also blsp0_spi function but that was probably the same mistake as
>>>> naming it SPI0.
>>> Hi,
>>>
>>> Sorry for making it confusing, but "blsp0_spi" is the correct function.
>>> Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT
>>> we call the nodes blsp1-blsp6.
>>>
>>> It would probably be better for me to rename the nodes to blsp0-5 instead.
>> OK, so instead I will add blsp0_spi to the bindings.
> 
> Can you add blsp0_uart and blsp0_i2c as well?
> All 6 of the QUP-s have same features.

Sure

Best regards,
Krzysztof