diff mbox series

[2/4] pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping

Message ID 20220907201528.9351-3-quic_amelende@quicinc.com
State New
Headers show
Series None | expand

Commit Message

Anjelique Melendez Sept. 7, 2022, 8:15 p.m. UTC
From: Anirudh Ghayal <quic_aghayal@quicinc.com>

The SPMI based PMICs have the HIGH and LOW GPIO output
strength mappings interchanged, fix them.

Keep the mapping same for older SSBI based PMICs.

CRs-Fixed: 2246473
Signed-off-by: Anirudh Ghayal <quic_aghayal@quicinc.com>
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-spmi-gpio.c     | 2 +-
 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c     | 4 ++--
 include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 9 +++++++--
 3 files changed, 10 insertions(+), 5 deletions(-)

Comments

Krzysztof Kozlowski Sept. 8, 2022, 11:14 a.m. UTC | #1
On 07/09/2022 22:15, Anjelique Melendez wrote:
> From: Anirudh Ghayal <quic_aghayal@quicinc.com>
> 
> The SPMI based PMICs have the HIGH and LOW GPIO output
> strength mappings interchanged, fix them.
> 
> Keep the mapping same for older SSBI based PMICs.
> 
> CRs-Fixed: 2246473

What is this tag about?

> Signed-off-by: Anirudh Ghayal <quic_aghayal@quicinc.com>
> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
> ---
>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c     | 2 +-
>  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c     | 4 ++--
>  include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 9 +++++++--
>  3 files changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> index cf6b6047de8d..fceccf1ec099 100644
> --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> @@ -525,7 +525,7 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
>  			pad->pullup = arg;
>  			break;
>  		case PMIC_GPIO_CONF_STRENGTH:
> -			if (arg > PMIC_GPIO_STRENGTH_LOW)
> +			if (arg > PMIC_GPIO_STRENGTH_HIGH)
>  				return -EINVAL;
>  			pad->strength = arg;
>  			break;
> diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> index 1b41adda8129..0f96d130813b 100644
> --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
> @@ -1,7 +1,7 @@
>  // SPDX-License-Identifier: GPL-2.0-only
>  /*
>   * Copyright (c) 2015, Sony Mobile Communications AB.
> - * Copyright (c) 2013, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2013, 2018 The Linux Foundation. All rights reserved.
>   */
>  
>  #include <linux/module.h>
> @@ -371,7 +371,7 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
>  			banks |= BIT(0);
>  			break;
>  		case PM8XXX_QCOM_DRIVE_STRENGH:
> -			if (arg > PMIC_GPIO_STRENGTH_LOW) {
> +			if (arg > PM8921_GPIO_STRENGTH_LOW) {
>  				dev_err(pctrl->dev, "invalid drive strength\n");
>  				return -EINVAL;
>  			}
> diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> index e5df5ce45a0f..950be952ad3e 100644
> --- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h

You cannot mix bindings with driver. This is an ABI break.
> @@ -12,9 +12,14 @@
>  #define PMIC_GPIO_PULL_UP_1P5_30	3
>  
>  #define PMIC_GPIO_STRENGTH_NO		0
> -#define PMIC_GPIO_STRENGTH_HIGH		1
> +#define PMIC_GPIO_STRENGTH_LOW		1
>  #define PMIC_GPIO_STRENGTH_MED		2
> -#define PMIC_GPIO_STRENGTH_LOW		3
> +#define PMIC_GPIO_STRENGTH_HIGH		3

Didn't you just break all DTSes in the world?

Best regards,
Krzysztof
Anjelique Melendez Sept. 8, 2022, 11:52 p.m. UTC | #2
On 9/8/2022 4:14 AM, Krzysztof Kozlowski wrote:
> On 07/09/2022 22:15, Anjelique Melendez wrote:
>> From: Anirudh Ghayal <quic_aghayal@quicinc.com>
>>
>> The SPMI based PMICs have the HIGH and LOW GPIO output
>> strength mappings interchanged, fix them.
>>
>> Keep the mapping same for older SSBI based PMICs.
>>
>> CRs-Fixed: 2246473
> 
> What is this tag about?
Forgot to remove this tag before up streamed. Will remove for next version.
> 
>> Signed-off-by: Anirudh Ghayal <quic_aghayal@quicinc.com>
>> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
>> ---
>>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c     | 2 +-
>>  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c     | 4 ++--
>>  include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 9 +++++++--
>>  3 files changed, 10 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> index cf6b6047de8d..fceccf1ec099 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> @@ -525,7 +525,7 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
>>  			pad->pullup = arg;
>>  			break;
>>  		case PMIC_GPIO_CONF_STRENGTH:
>> -			if (arg > PMIC_GPIO_STRENGTH_LOW)
>> +			if (arg > PMIC_GPIO_STRENGTH_HIGH)
>>  				return -EINVAL;
>>  			pad->strength = arg;
>>  			break;
>> diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> index 1b41adda8129..0f96d130813b 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> @@ -1,7 +1,7 @@
>>  // SPDX-License-Identifier: GPL-2.0-only
>>  /*
>>   * Copyright (c) 2015, Sony Mobile Communications AB.
>> - * Copyright (c) 2013, The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2013, 2018 The Linux Foundation. All rights reserved.
>>   */
>>  
>>  #include <linux/module.h>
>> @@ -371,7 +371,7 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
>>  			banks |= BIT(0);
>>  			break;
>>  		case PM8XXX_QCOM_DRIVE_STRENGH:
>> -			if (arg > PMIC_GPIO_STRENGTH_LOW) {
>> +			if (arg > PM8921_GPIO_STRENGTH_LOW) {
>>  				dev_err(pctrl->dev, "invalid drive strength\n");
>>  				return -EINVAL;
>>  			}
>> diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>> index e5df5ce45a0f..950be952ad3e 100644
>> --- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>> +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> 
> You cannot mix bindings with driver. This is an ABI break.
Ack - Will separate into two changes.
>> @@ -12,9 +12,14 @@
>>  #define PMIC_GPIO_PULL_UP_1P5_30	3
>>  
>>  #define PMIC_GPIO_STRENGTH_NO		0
>> -#define PMIC_GPIO_STRENGTH_HIGH		1
>> +#define PMIC_GPIO_STRENGTH_LOW		1
>>  #define PMIC_GPIO_STRENGTH_MED		2
>> -#define PMIC_GPIO_STRENGTH_LOW		3
>> +#define PMIC_GPIO_STRENGTH_HIGH		3
> 
> Didn't you just break all DTSes in the world?
Ack - lol. Next version will include changes to update any DTS
that uses PMIC_GPIO_STRENGTH_ 
> 
> Best regards,
> Krzysztof

Thanks,
Anjelique
David Collins Sept. 9, 2022, 12:25 a.m. UTC | #3
On 9/8/22 04:14, Krzysztof Kozlowski wrote:
> On 07/09/2022 22:15, Anjelique Melendez wrote:
>> From: Anirudh Ghayal <quic_aghayal@quicinc.com>
>>
>> The SPMI based PMICs have the HIGH and LOW GPIO output
>> strength mappings interchanged, fix them.
>>
>> Keep the mapping same for older SSBI based PMICs.
>>
>> CRs-Fixed: 2246473
> 
> What is this tag about?

This is for internal tracking.  It will be removed in the next version
of this patch series.


>>  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c     | 2 +-
>>  drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c     | 4 ++--
>>  include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 9 +++++++--
>>  3 files changed, 10 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> index cf6b6047de8d..fceccf1ec099 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
>> @@ -525,7 +525,7 @@ static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
>>  			pad->pullup = arg;
>>  			break;
>>  		case PMIC_GPIO_CONF_STRENGTH:
>> -			if (arg > PMIC_GPIO_STRENGTH_LOW)
>> +			if (arg > PMIC_GPIO_STRENGTH_HIGH)
>>  				return -EINVAL;
>>  			pad->strength = arg;
>>  			break;
>> diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> index 1b41adda8129..0f96d130813b 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
>> @@ -1,7 +1,7 @@
>>  // SPDX-License-Identifier: GPL-2.0-only
>>  /*
>>   * Copyright (c) 2015, Sony Mobile Communications AB.
>> - * Copyright (c) 2013, The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2013, 2018 The Linux Foundation. All rights reserved.
>>   */
>>  
>>  #include <linux/module.h>
>> @@ -371,7 +371,7 @@ static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
>>  			banks |= BIT(0);
>>  			break;
>>  		case PM8XXX_QCOM_DRIVE_STRENGH:
>> -			if (arg > PMIC_GPIO_STRENGTH_LOW) {
>> +			if (arg > PM8921_GPIO_STRENGTH_LOW) {
>>  				dev_err(pctrl->dev, "invalid drive strength\n");
>>  				return -EINVAL;
>>  			}
>> diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>> index e5df5ce45a0f..950be952ad3e 100644
>> --- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>> +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
> 
> You cannot mix bindings with driver. This is an ABI break.

This could be split into two patches.  However, both would need to make
it into any given build to avoid runtime regressions when
pinctrl-spmi-gpio.c rejects GPIO strength configurations larger than 1.

I suppose that this kind of bi-directional dependency could be avoided
by using one of these checks instead in the driver:

if (arg > 3) {

or

if (arg > max(PMIC_GPIO_STRENGTH_LOW, PMIC_GPIO_STRENGTH_HIGH))

Going this route would only require that the driver patch is picked up
before the DT header patch.



>> @@ -12,9 +12,14 @@
>>  #define PMIC_GPIO_PULL_UP_1P5_30	3
>>  
>>  #define PMIC_GPIO_STRENGTH_NO		0
>> -#define PMIC_GPIO_STRENGTH_HIGH		1
>> +#define PMIC_GPIO_STRENGTH_LOW		1
>>  #define PMIC_GPIO_STRENGTH_MED		2
>> -#define PMIC_GPIO_STRENGTH_LOW		3
>> +#define PMIC_GPIO_STRENGTH_HIGH		3
> 
> Didn't you just break all DTSes in the world?

Currently, all PMIC GPIO peripherals managed by the pinctrl-spmi-gpio
driver are having their drive strength control register programmed
incorrectly at runtime for the constant name used in DT (i.e.
PMIC_GPIO_STRENGTH_LOW vs PMIC_GPIO_STRENGTH_HIGH).  Changing the values
of those constants as done in this patch fixes that incorrect behavior.

The qcom,drive-strength DT property is taking a raw drive strength
control register value instead of some logical strength abstraction.
I'm not sure of a better way to handle the situation than fixing the
incorrect drive strength constant to register value mapping as defined
in qcom,pmic-gpio.h.

Changing the mapping in qcom,pmic-gpio.h without updating any dtsi files
could cause a problem for very old targets that use SSBI instead of SPMI
for PMIC communication.  However, for there to actually be a problem,
PMIC_GPIO_STRENGTH_LOW or PMIC_GPIO_STRENGTH_HIGH would need to be
specified for the SSBI PMIC.  That would be GPIO devices with compatible
strings: "qcom,pm8018-gpio", "qcom,pm8038-gpio", "qcom,pm8058-gpio",
"qcom,pm8917-gpio", or "qcom,pm8921-gpio".  I could find no instances of
this situation in the kernel source tree.

The PMIC_GPIO_STRENGTH_LOW or PMIC_GPIO_STRENGTH_HIGH usage in dtsi
files for SPMI PMICs does not need to be modified.  The DT header patch
fixes configurations that are currently broken for them.

Note that the drive strength misconfiguration issue doesn't present a
problem for commercial products as this patch has been cherry-picked
downstream for several years.

Take care,
David
Krzysztof Kozlowski Sept. 9, 2022, 7:34 a.m. UTC | #4
On 09/09/2022 02:25, David Collins wrote:
>>> diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>> index e5df5ce45a0f..950be952ad3e 100644
>>> --- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>> +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>
>> You cannot mix bindings with driver. This is an ABI break.
> 
> This could be split into two patches.  However, both would need to make
> it into any given build to avoid runtime regressions when
> pinctrl-spmi-gpio.c rejects GPIO strength configurations larger than 1.

Which proves this is an ABI break. You need to gracefully handle in the
driver.

> 
> I suppose that this kind of bi-directional dependency could be avoided
> by using one of these checks instead in the driver:
> 
> if (arg > 3) {
> 
> or
> 
> if (arg > max(PMIC_GPIO_STRENGTH_LOW, PMIC_GPIO_STRENGTH_HIGH))
> 
> Going this route would only require that the driver patch is picked up
> before the DT header patch.

You cannot change constants in the DT bindings header. Regardless
whether now or in the future - the constants are frozen. Otherwise it is
an ABI break. It would be acceptable only if existing feature was
completely broken and never worked.

> 
> 
> 
>>> @@ -12,9 +12,14 @@
>>>  #define PMIC_GPIO_PULL_UP_1P5_30	3
>>>  
>>>  #define PMIC_GPIO_STRENGTH_NO		0
>>> -#define PMIC_GPIO_STRENGTH_HIGH		1
>>> +#define PMIC_GPIO_STRENGTH_LOW		1
>>>  #define PMIC_GPIO_STRENGTH_MED		2
>>> -#define PMIC_GPIO_STRENGTH_LOW		3
>>> +#define PMIC_GPIO_STRENGTH_HIGH		3
>>
>> Didn't you just break all DTSes in the world?
> 
> Currently, all PMIC GPIO peripherals managed by the pinctrl-spmi-gpio
> driver are having their drive strength control register programmed
> incorrectly at runtime for the constant name used in DT (i.e.
> PMIC_GPIO_STRENGTH_LOW vs PMIC_GPIO_STRENGTH_HIGH).  Changing the values
> of those constants as done in this patch fixes that incorrect behavior.

Wait. The values in the bindings should be only, *only* abstract ID
numbers. Not register values. How is it related to the value being
programmed in the driver? This is just an enum. If you have DTS with
PMIC_GPIO_STRENGTH_LOW you program 0xwhatever-you-wish. Not exactly
current value of "PMIC_GPIO_STRENGTH_LOW".

You need to fix the driver, not the bindings.

> 
> The qcom,drive-strength DT property is taking a raw drive strength
> control register value instead of some logical strength abstraction.
> I'm not sure of a better way to handle the situation than fixing the
> incorrect drive strength constant to register value mapping as defined
> in qcom,pmic-gpio.h.

Bindings are not for defining register values, but to define the DTS.
Feel free to use binding constants for register values if they fit
you... but if they don't fit, fix the driver. Not the bindings.

> 
> Changing the mapping in qcom,pmic-gpio.h without updating any dtsi files
> could cause a problem for very old targets that use SSBI instead of SPMI
> for PMIC communication.  However, for there to actually be a problem,
> PMIC_GPIO_STRENGTH_LOW or PMIC_GPIO_STRENGTH_HIGH would need to be
> specified for the SSBI PMIC.  That would be GPIO devices with compatible
> strings: "qcom,pm8018-gpio", "qcom,pm8038-gpio", "qcom,pm8058-gpio",
> "qcom,pm8917-gpio", or "qcom,pm8921-gpio".  I could find no instances of
> this situation in the kernel source tree.
> 
> The PMIC_GPIO_STRENGTH_LOW or PMIC_GPIO_STRENGTH_HIGH usage in dtsi
> files for SPMI PMICs does not need to be modified.  The DT header patch
> fixes configurations that are currently broken for them.
> 
> Note that the drive strength misconfiguration issue doesn't present a
> problem for commercial products as this patch has been cherry-picked
> downstream for several years.

It will affect several other out-of-tree users and other projects. Don't
think only about Qualcomm tree, but about entire Qualcomm ecosystem and
its users.


Best regards,
Krzysztof
Krzysztof Kozlowski Sept. 9, 2022, 7:35 a.m. UTC | #5
On 09/09/2022 01:52, Anjelique Melendez wrote:
pio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>> index e5df5ce45a0f..950be952ad3e 100644
>>> --- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>> +++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
>>
>> You cannot mix bindings with driver. This is an ABI break.
> Ack - Will separate into two changes.
>>> @@ -12,9 +12,14 @@
>>>  #define PMIC_GPIO_PULL_UP_1P5_30	3
>>>  
>>>  #define PMIC_GPIO_STRENGTH_NO		0
>>> -#define PMIC_GPIO_STRENGTH_HIGH		1
>>> +#define PMIC_GPIO_STRENGTH_LOW		1
>>>  #define PMIC_GPIO_STRENGTH_MED		2
>>> -#define PMIC_GPIO_STRENGTH_LOW		3
>>> +#define PMIC_GPIO_STRENGTH_HIGH		3
>>
>> Didn't you just break all DTSes in the world?
> Ack - lol. Next version will include changes to update any DTS
> that uses PMIC_GPIO_STRENGTH_ 

There is discussion with David, so please wait till consensus is
reached. It seems you want to change DT binding constant to match
register value which is not appropriate. Constants are not change'able.
Constants are abstractions which might or might not match register value.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
index cf6b6047de8d..fceccf1ec099 100644
--- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
@@ -525,7 +525,7 @@  static int pmic_gpio_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
 			pad->pullup = arg;
 			break;
 		case PMIC_GPIO_CONF_STRENGTH:
-			if (arg > PMIC_GPIO_STRENGTH_LOW)
+			if (arg > PMIC_GPIO_STRENGTH_HIGH)
 				return -EINVAL;
 			pad->strength = arg;
 			break;
diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
index 1b41adda8129..0f96d130813b 100644
--- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
+++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
@@ -1,7 +1,7 @@ 
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2015, Sony Mobile Communications AB.
- * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013, 2018 The Linux Foundation. All rights reserved.
  */
 
 #include <linux/module.h>
@@ -371,7 +371,7 @@  static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
 			banks |= BIT(0);
 			break;
 		case PM8XXX_QCOM_DRIVE_STRENGH:
-			if (arg > PMIC_GPIO_STRENGTH_LOW) {
+			if (arg > PM8921_GPIO_STRENGTH_LOW) {
 				dev_err(pctrl->dev, "invalid drive strength\n");
 				return -EINVAL;
 			}
diff --git a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
index e5df5ce45a0f..950be952ad3e 100644
--- a/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
+++ b/include/dt-bindings/pinctrl/qcom,pmic-gpio.h
@@ -12,9 +12,14 @@ 
 #define PMIC_GPIO_PULL_UP_1P5_30	3
 
 #define PMIC_GPIO_STRENGTH_NO		0
-#define PMIC_GPIO_STRENGTH_HIGH		1
+#define PMIC_GPIO_STRENGTH_LOW		1
 #define PMIC_GPIO_STRENGTH_MED		2
-#define PMIC_GPIO_STRENGTH_LOW		3
+#define PMIC_GPIO_STRENGTH_HIGH		3
+
+#define PM8921_GPIO_STRENGTH_NO		0
+#define PM8921_GPIO_STRENGTH_HIGH	1
+#define PM8921_GPIO_STRENGTH_MED	2
+#define PM8921_GPIO_STRENGTH_LOW	3
 
 /*
  * Note: PM8018 GPIO3 and GPIO4 are supporting