| Message ID | 20220902091028.1346952-1-benedikt.niedermayr@siemens.com |
|---|---|
| Headers | show |
| Series | omap-gpmc wait pin additions | expand |
On 02/09/2022 12:10, B. Niedermayr wrote: > From: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> > > There is currently no possibility for the gpmc to set either the > waitp-pin polarity or use the same wait-pin for different cs-regions. > > While the current implementation may fullfill most usecases, it may not > be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where > more complex interfacing options where possible. > > For example interfacing an ASIC which offers multiple cs-regions but > only one waitpin the current driver and dt-bindings are not sufficient. > > While using the same waitpin for different cs-regions worked for older > kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with > newer kernels (>5.10). > > Changes since v1: > * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list > stays the same! No... thanks for rebasing yet still you use wrong address email. > > ./scripts/get_maintainer.pl drivers/memory/omap-gpmc.c > Roger Quadros <rogerq@kernel.org> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) > Tony Lindgren <tony@atomide.com> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) > Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (maintainer:MEMORY CONTROLLER DRIVERS) Different address email. Best regards, Krzysztof
On Mon, 2022-09-05 at 09:44 +0300, Krzysztof Kozlowski wrote: > On 02/09/2022 12:10, B. Niedermayr wrote: > > From: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> > > > > There is currently no possibility for the gpmc to set either the > > waitp-pin polarity or use the same wait-pin for different cs- > > regions. > > > > While the current implementation may fullfill most usecases, it may > > not > > be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), > > where > > more complex interfacing options where possible. > > > > For example interfacing an ASIC which offers multiple cs-regions > > but > > only one waitpin the current driver and dt-bindings are not > > sufficient. > > > > While using the same waitpin for different cs-regions worked for > > older > > kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) > > with > > newer kernels (>5.10). > > > > Changes since v1: > > * Rebase against recent 6.0.0-rc3 kernel, but the maintainers > > list > > stays the same! > > No... thanks for rebasing yet still you use wrong address email. > > > ./scripts/get_maintainer.pl drivers/memory/omap-gpmc.c > > Roger Quadros <rogerq@kernel.org> (maintainer:OMAP GENERAL > > PURPOSE MEMORY CONTROLLER SUPPORT) > > Tony Lindgren <tony@atomide.com> (maintainer:OMAP GENERAL PURPOSE > > MEMORY CONTROLLER SUPPORT) > > Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > (maintainer:MEMORY CONTROLLER DRIVERS) > > Different address email. > > > Best regards, > Krzysztof Ok now I see: krzk@kernel.org has changed to krzysztof.kozlowski@linaro.org
From: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> There is currently no possibility for the gpmc to set either the waitp-pin polarity or use the same wait-pin for different cs-regions. While the current implementation may fullfill most usecases, it may not be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where more complex interfacing options where possible. For example interfacing an ASIC which offers multiple cs-regions but only one waitpin the current driver and dt-bindings are not sufficient. While using the same waitpin for different cs-regions worked for older kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with newer kernels (>5.10). Changes since v1: * Rebase against recent 6.0.0-rc3 kernel, but the maintainers list stays the same! ./scripts/get_maintainer.pl drivers/memory/omap-gpmc.c Roger Quadros <rogerq@kernel.org> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) Tony Lindgren <tony@atomide.com> (maintainer:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (maintainer:MEMORY CONTROLLER DRIVERS) linux-omap@vger.kernel.org (open list:OMAP GENERAL PURPOSE MEMORY CONTROLLER SUPPORT) linux-kernel@vger.kernel.org (open list:MEMORY CONTROLLER DRIVERS) ./scripts/get_maintainer.pl Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> (maintainer:MEMORY CONTROLLER DRIVERS) Rob Herring <robh+dt@kernel.org> (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Tony Lindgren <tony@atomide.com> (in file) Roger Quadros <rogerq@kernel.org> (in file) linux-kernel@vger.kernel.org (open list:MEMORY CONTROLLER DRIVERS) devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) Benedikt Niedermayr (3): memory: omap-gpmc: allow shared wait pins memory: omap-gpmc: add support for wait pin polarity dt-bindings: memory-controllers: gpmc-child: Add binding for wait-pin-polarity .../memory-controllers/ti,gpmc-child.yaml | 7 ++++ drivers/memory/omap-gpmc.c | 38 +++++++++++++++---- include/linux/platform_data/gpmc-omap.h | 1 + 3 files changed, 39 insertions(+), 7 deletions(-)