[6/6] gpio: macsmc: Add IRQ support

From: Hector Martin <marcan@marcan.st>

Add IRQ support to the macsmc driver. This patch has updates from Joey
Gouly and Russell King.

Signed-off-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---
 drivers/gpio/gpio-macsmc.c | 156 +++++++++++++++++++++++++++++++++++++
 1 file changed, 156 insertions(+)

On Thu, Sep 1, 2022 at 3:54 PM Russell King <rmk+kernel@armlinux.org.uk> wrote:

> From: Hector Martin <marcan@marcan.st>
>
> Add IRQ support to the macsmc driver. This patch has updates from Joey
> Gouly and Russell King.
>
> Signed-off-by: Hector Martin <marcan@marcan.st>
> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Overall looks very good, again some detailed remarks from Andy
should be addressed, apart from that you need to add:

select GPIOLIB_IRQCHIP

to the Kconfig entry for the driver, or else the compile robots are
going to hit some configuration that doesn't compile.

> +       struct mutex irq_mutex;
> +       DECLARE_BITMAP(irq_supported, MAX_GPIO);

If you can use the .init_valid_mask from struct gpio_irq_chip
instead, it will allocate this mask dynamically for the irqchip.
(Further comment below.)

> +       DECLARE_BITMAP(irq_enable_shadow, MAX_GPIO);

Please rename irq_unmasked_shadow as it is tracking
this and not what the irqchip core calls enabled/disabled.

> +       DECLARE_BITMAP(irq_enable, MAX_GPIO);

I think this state should be possible to set/get from the irqchip
core. !irqd_irq_masked(d) on the descriptor, correct me if I'm wrong.

> +       u32 irq_mode_shadow[MAX_GPIO];
> +       u32 irq_mode[MAX_GPIO];
>
>         int first_index;
>  };
> @@ -161,6 +172,7 @@ static int macsmc_gpio_init_valid_mask(struct gpio_chip *gc,
>         for (i = 0; i < count; i++) {
>                 smc_key key;
>                 int gpio_nr;
> +               u32 val;
>                 int ret = apple_smc_get_key_by_index(smcgp->smc, smcgp->first_index + i, &key);
>
>                 if (ret < 0)
> @@ -176,11 +188,143 @@ static int macsmc_gpio_init_valid_mask(struct gpio_chip *gc,
>                 }
>
>                 set_bit(gpio_nr, valid_mask);
> +
> +               /* Check for IRQ support */
> +               ret = apple_smc_rw_u32(smcgp->smc, key, CMD_IRQ_MODE, &val);
> +               if (!ret)
> +                       set_bit(gpio_nr, smcgp->irq_supported);
> +       }
> +
> +       return 0;
> +}

This  gets initialized from the struct gpio_chip .init_valid_mask, but
struct gpio_irq_chip has its own callback with the same name, which
is preferred to be used for this, check if you can use that instead, it
makes the use more obvious.

> +static int macsmc_gpio_event(struct notifier_block *nb, unsigned long event, void *data)
> +{
> +       struct macsmc_gpio *smcgp = container_of(nb, struct macsmc_gpio, nb);
> +       u16 type = event >> 16;
> +       u8 offset = (event >> 8) & 0xff;
> +       smc_key key = macsmc_gpio_key(offset);
> +       unsigned long flags;
> +        int ret;
> +
> +       if (type != SMC_EV_GPIO)
> +               return NOTIFY_DONE;
> +
> +       if (offset > MAX_GPIO) {
> +               dev_err(smcgp->dev, "GPIO event index %d out of range\n", offset);
> +               return NOTIFY_BAD;
> +       }
> +
> +       local_irq_save(flags);
> +       ret = generic_handle_domain_irq(smcgp->gc.irq.domain, offset);
> +       local_irq_restore(flags);

Isn't irq_bus_lock/unlock protecting us here already?
(I might be getting it wrong...)

Since this is coming from a notifier and not an IRQ or threaded
IRQ I actually am a bit puzzled on how to handle it... you probably
know it better than me, maybe ask Marc Z if anything is
unclear.

> +       if (apple_smc_write_u32(smcgp->smc, key, CMD_IRQ_ACK | 1) < 0)
> +               dev_err(smcgp->dev, "GPIO IRQ ack failed for %p4ch\n", &key);

isn't this one of those cases where we should implement the
irqchip callback .irq_ack() specifically for this?

That callback will only be used by edge triggered IRQs but
I guess that would realistically be all we support anyway?
(See comment below on .set_type)

> +static void macsmc_gpio_irq_enable(struct irq_data *d)
> +{
> +       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> +       struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
> +
> +       gpiochip_enable_irq(gc, irqd_to_hwirq(d));
> +       set_bit(irqd_to_hwirq(d), smcgp->irq_enable_shadow);
> +}
> +
> +static void macsmc_gpio_irq_disable(struct irq_data *d)
> +{
> +       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> +       struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
> +
> +       clear_bit(irqd_to_hwirq(d), smcgp->irq_enable_shadow);
> +       gpiochip_disable_irq(gc, irqd_to_hwirq(d));
> +}

I would rename these unmask/mask to match the callback
hooks they are implementing, since there are irqchips
callbacks with these names I get a but confused.

> +static int macsmc_gpio_irq_set_type(struct irq_data *d, unsigned int type)
> +{
> +       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> +       struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
> +       int offset = irqd_to_hwirq(d);
> +       u32 mode;
> +
> +       if (!test_bit(offset, smcgp->irq_supported))
> +               return -EINVAL;
> +
> +       switch (type & IRQ_TYPE_SENSE_MASK) {
> +       case IRQ_TYPE_LEVEL_HIGH:
> +               mode = IRQ_MODE_HIGH;
> +               break;
> +       case IRQ_TYPE_LEVEL_LOW:
> +               mode = IRQ_MODE_LOW;
> +               break;
> +       case IRQ_TYPE_EDGE_RISING:
> +               mode = IRQ_MODE_RISING;
> +               break;
> +       case IRQ_TYPE_EDGE_FALLING:
> +               mode = IRQ_MODE_FALLING;
> +               break;
> +       case IRQ_TYPE_EDGE_BOTH:
> +               mode = IRQ_MODE_BOTH;
> +               break;
> +       default:
> +               return -EINVAL;

I don't know how level IRQs would work on this essentially
message-passing process context interrupt. Maybe I am getting
it all wrong, but for level the line should be held low/high until
the IRQ is serviced, it would be possible to test if this actually
works by *not* servicing an IRQ and see if the SMC then sends
another message notifier for the same IRQ.

I strongly suspect that actually only edges are supported, but
there might be semantics I don't understand here.

>         }
>
> +       smcgp->irq_mode_shadow[offset] = mode;

Hm yeah I guess this shadow mode is necessary for the sync
to work.

>         return 0;
>  }
>
> +static void macsmc_gpio_irq_bus_lock(struct irq_data *d)
> +{
> +       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> +       struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
> +
> +       mutex_lock(&smcgp->irq_mutex);
> +}
> +
> +static void macsmc_gpio_irq_bus_sync_unlock(struct irq_data *d)
> +{
> +       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
> +       struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
> +       smc_key key = macsmc_gpio_key(irqd_to_hwirq(d));
> +       int offset = irqd_to_hwirq(d);
> +       bool val;
> +
> +       if (smcgp->irq_mode_shadow[offset] != smcgp->irq_mode[offset]) {
> +               u32 cmd = CMD_IRQ_MODE | smcgp->irq_mode_shadow[offset];
> +               if (apple_smc_write_u32(smcgp->smc, key, cmd) < 0)
> +                       dev_err(smcgp->dev, "GPIO IRQ config failed for %p4ch = 0x%x\n", &key, cmd);
> +               else
> +                       smcgp->irq_mode_shadow[offset] = smcgp->irq_mode[offset];
> +       }
> +
> +       val = test_bit(offset, smcgp->irq_enable_shadow);
> +       if (test_bit(offset, smcgp->irq_enable) != val) {

So what you want to know for each line is (correct me if I'm wrong):
- Is it enabled (unmasked) or not?
- Did it get changed enabled->disabled, disabled->enabled since
  macsmc_gpio_irq_bus_lock()?

Doesn't the irqchip core track the first part of this for you?
irqd_irq_masked(d) should tell you the same thing as
irq_enable, just inverted.

irq_enable_shadow is a bit tricker, I guess you might need that since
the irqchip doesn't track state changes.

>  static int macsmc_gpio_probe(struct platform_device *pdev)
>  {
>         struct macsmc_gpio *smcgp;
> @@ -221,6 +365,18 @@ static int macsmc_gpio_probe(struct platform_device *pdev)
>         smcgp->gc.base = -1;
>         smcgp->gc.parent = &pdev->dev;
>
> +       gpio_irq_chip_set_chip(&smcgp->gc.irq, &macsmc_gpio_irqchip);
> +       smcgp->gc.irq.parent_handler = NULL;
> +       smcgp->gc.irq.num_parents = 0;
> +       smcgp->gc.irq.parents = NULL;
> +       smcgp->gc.irq.default_type = IRQ_TYPE_NONE;
> +       smcgp->gc.irq.handler = handle_simple_irq;

I would consider setting this to handle_edge_irq() and implement
.irq_ack(). I might be wrong.

But overall since this IRQ is driven by a notifier I feel a bit lost.

Yours,
Linus Walleij

On Tue, Sep 06, 2022 at 04:00:31PM +0900, Hector Martin wrote:
> On 02/09/2022 22.21, Linus Walleij wrote:
> >> +       switch (type & IRQ_TYPE_SENSE_MASK) {
> >> +       case IRQ_TYPE_LEVEL_HIGH:
> >> +               mode = IRQ_MODE_HIGH;
> >> +               break;
> >> +       case IRQ_TYPE_LEVEL_LOW:
> >> +               mode = IRQ_MODE_LOW;
> >> +               break;
> >> +       case IRQ_TYPE_EDGE_RISING:
> >> +               mode = IRQ_MODE_RISING;
> >> +               break;
> >> +       case IRQ_TYPE_EDGE_FALLING:
> >> +               mode = IRQ_MODE_FALLING;
> >> +               break;
> >> +       case IRQ_TYPE_EDGE_BOTH:
> >> +               mode = IRQ_MODE_BOTH;
> >> +               break;
> >> +       default:
> >> +               return -EINVAL;
> > 
> > I don't know how level IRQs would work on this essentially
> > message-passing process context interrupt. Maybe I am getting
> > it all wrong, but for level the line should be held low/high until
> > the IRQ is serviced, it would be possible to test if this actually
> > works by *not* servicing an IRQ and see if the SMC then sends
> > another message notifier for the same IRQ.
> > 
> > I strongly suspect that actually only edges are supported, but
> > there might be semantics I don't understand here.
> 
> IIRC that is exactly what happens - the SMC will re-fire the IRQ after
> the ACK if it is set to level mode and still at the active level.
> 
> I do remember testing all the modes carefully when implementing this to
> figure out what the precise semantics are, and I *think* I agonized over
> the flow handlers quite a bit and decided this way would work properly
> for all the modes, but it's been a while so I'd have to take a look
> again to convince myself again :)

Thanks for the clarification - I think it would be useful to put some
of that as comments before the CMD_IRQ_ACK write to head off any
questions about this in the future. Something like this maybe?

        /*
         * This is not an "ack" int he i8253 PIC sense - it is used for level
         * interrupts as well. The SMC will re-fire the interrupt event after
         * this ACK if the level interrupt is still active.
         */
        if (apple_smc_write_u32(smcgp->smc, key, CMD_IRQ_ACK | 1) < 0)
                dev_err(smcgp->dev, "GPIO IRQ ack failed for %p4ch\n", &key);