| Message ID | 20220820195750.70861-8-brad@pensando.io |
|---|---|
| State | New |
| Headers | show |
| Series | Support AMD Pensando Elba SoC | expand |
On Sat, 20 Aug 2022 12:57:40 -0700, Brad Larson wrote: > From: Brad Larson <blarson@amd.com> > > Document bindings for AMD Pensando Elba SR Reset Controller > > Signed-off-by: Brad Larson <blarson@amd.com> > --- > .../reset/amd,pensando-elbasr-reset.yaml | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/amd,pensando-elbasr-reset.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/reset/amd,pensando-elbasr-reset.example.dtb:0:0: /example-0/spi/spi@0: failed to match any schema with compatible: ['amd,pensando-elbasr'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/reset/amd,pensando-elbasr-reset.yaml b/Documentation/devicetree/bindings/reset/amd,pensando-elbasr-reset.yaml new file mode 100644 index 000000000000..0fdc6cc5ecdd --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amd,pensando-elbasr-reset.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/amd,pensando-elbasr-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD Pensando Elba SoC Reset Controller + +maintainers: + - Brad Larson <blarson@amd.com> + +description: | + AMD Pensando Elba SoC reset controller driver which supports a resource + controller connected to the Elba SoC over a SPI bus. The Elba reset + controller must be defined as a child node of the Elba SPI bus + chip-select 0 node. + +properties: + compatible: + const: amd,pensando-elbasr-reset + + reg: + const: 0 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#reset-cells' + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + num-cs = <4>; + + spi@0 { + compatible = "amd,pensando-elbasr"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <12000000>; + + rstc: reset-controller@0 { + compatible = "amd,pensando-elbasr-reset"; + reg = <0>; + #reset-cells = <1>; + }; + }; + }; + +...