diff mbox series

[v1,4/7] i2c-mlxbf.c: incorrect base address passed during io write

Message ID 20220816225412.9095-5-asmaa@nvidia.com
State Superseded
Headers show
Series i2c-mlxbf.c: bug fixes and new feature support | expand

Commit Message

Asmaa Mnebhi Aug. 16, 2022, 10:54 p.m. UTC
Correct base address used during io write.

Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
---
 drivers/i2c/busses/i2c-mlxbf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Wolfram Sang Aug. 18, 2022, 4:27 p.m. UTC | #1
On Tue, Aug 16, 2022 at 06:54:09PM -0400, Asmaa Mnebhi wrote:
> Correct base address used during io write.

So, the driver never ever worked? Or were we lucky that it worked
somehow?

> 
> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-mlxbf.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c
> index 39051c4a6db2..02ed6983c35c 100644
> --- a/drivers/i2c/busses/i2c-mlxbf.c
> +++ b/drivers/i2c/busses/i2c-mlxbf.c
> @@ -655,7 +655,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
>  	/* Clear status bits. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
>  	/* Set the cause data. */
> -	writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
> +	writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
>  	/* Zero PEC byte. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
>  	/* Zero byte count. */
> -- 
> 2.30.1
>
Asmaa Mnebhi Aug. 18, 2022, 4:40 p.m. UTC | #2
It only worked on our first generation of BlueField (and we were lucky I think), not in BlueField-2 gen.

-----Original Message-----
From: Wolfram Sang <wsa@kernel.org> 
Sent: Thursday, August 18, 2022 12:27 PM
To: Asmaa Mnebhi <asmaa@nvidia.com>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>; linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Khalil Blaiech <kblaiech@nvidia.com>
Subject: Re: [PATCH v1 4/7] i2c-mlxbf.c: incorrect base address passed during io write

On Tue, Aug 16, 2022 at 06:54:09PM -0400, Asmaa Mnebhi wrote:
> Correct base address used during io write.

So, the driver never ever worked? Or were we lucky that it worked somehow?

> 
> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-mlxbf.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-mlxbf.c 
> b/drivers/i2c/busses/i2c-mlxbf.c index 39051c4a6db2..02ed6983c35c 
> 100644
> --- a/drivers/i2c/busses/i2c-mlxbf.c
> +++ b/drivers/i2c/busses/i2c-mlxbf.c
> @@ -655,7 +655,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
>  	/* Clear status bits. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
>  	/* Set the cause data. */
> -	writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
> +	writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
>  	/* Zero PEC byte. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
>  	/* Zero byte count. */
> --
> 2.30.1
>
Asmaa Mnebhi Aug. 18, 2022, 5:21 p.m. UTC | #3
Apologies, just want to clarify that I was talking about the frequency fix "[PATCH v1 1/7] i2c-mlxbf.c: Fix frequency calculation".
In regards to the below bug fix "[PATCH v1 4/7] i2c-mlxbf.c: incorrect base address passed during io write", we were lucky it works because this write:
writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
didn't have any impact on the overall functionality of the read/write transactions. Writing to smbus->io + 0x18 (aka  MLXBF_I2C_CAUSE_OR_CLEAR) corresponds to sc_low_timeout register which sets the timeout value before a read/write transaction aborts. 

-----Original Message-----
From: Asmaa Mnebhi 
Sent: Thursday, August 18, 2022 12:41 PM
To: Wolfram Sang <wsa@kernel.org>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>; linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Khalil Blaiech <kblaiech@nvidia.com>
Subject: RE: [PATCH v1 4/7] i2c-mlxbf.c: incorrect base address passed during io write

It only worked on our first generation of BlueField (and we were lucky I think), not in BlueField-2 gen.

-----Original Message-----
From: Wolfram Sang <wsa@kernel.org>
Sent: Thursday, August 18, 2022 12:27 PM
To: Asmaa Mnebhi <asmaa@nvidia.com>
Cc: Wolfram Sang <wsa+renesas@sang-engineering.com>; linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Khalil Blaiech <kblaiech@nvidia.com>
Subject: Re: [PATCH v1 4/7] i2c-mlxbf.c: incorrect base address passed during io write

On Tue, Aug 16, 2022 at 06:54:09PM -0400, Asmaa Mnebhi wrote:
> Correct base address used during io write.

So, the driver never ever worked? Or were we lucky that it worked somehow?

> 
> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com>
> Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
> ---
>  drivers/i2c/busses/i2c-mlxbf.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/i2c/busses/i2c-mlxbf.c 
> b/drivers/i2c/busses/i2c-mlxbf.c index 39051c4a6db2..02ed6983c35c
> 100644
> --- a/drivers/i2c/busses/i2c-mlxbf.c
> +++ b/drivers/i2c/busses/i2c-mlxbf.c
> @@ -655,7 +655,7 @@ static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
>  	/* Clear status bits. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
>  	/* Set the cause data. */
> -	writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
> +	writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
>  	/* Zero PEC byte. */
>  	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
>  	/* Zero byte count. */
> --
> 2.30.1
>
Wolfram Sang Aug. 18, 2022, 8:24 p.m. UTC | #4
Thanks for the heads up.

> didn't have any impact on the overall functionality of the read/write transactions. Writing to smbus->io + 0x18 (aka  MLXBF_I2C_CAUSE_OR_CLEAR) corresponds to sc_low_timeout register which sets the timeout value before a read/write transaction aborts. 

I understand. Could we have the above sentences (or something similar)
in the commit message then?
Asmaa Mnebhi Aug. 18, 2022, 8:30 p.m. UTC | #5
Sure!

-----Original Message-----
From: Wolfram Sang <wsa@kernel.org> 
Sent: Thursday, August 18, 2022 4:24 PM
To: Asmaa Mnebhi <asmaa@nvidia.com>
Cc: linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Khalil Blaiech <kblaiech@nvidia.com>
Subject: Re: [PATCH v1 4/7] i2c-mlxbf.c: incorrect base address passed during io write


Thanks for the heads up.

> didn't have any impact on the overall functionality of the read/write transactions. Writing to smbus->io + 0x18 (aka  MLXBF_I2C_CAUSE_OR_CLEAR) corresponds to sc_low_timeout register which sets the timeout value before a read/write transaction aborts. 

I understand. Could we have the above sentences (or something similar) in the commit message then?
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c
index 39051c4a6db2..02ed6983c35c 100644
--- a/drivers/i2c/busses/i2c-mlxbf.c
+++ b/drivers/i2c/busses/i2c-mlxbf.c
@@ -655,7 +655,7 @@  static int mlxbf_i2c_smbus_enable(struct mlxbf_i2c_priv *priv, u8 slave,
 	/* Clear status bits. */
 	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
 	/* Set the cause data. */
-	writel(~0x0, priv->smbus->io + MLXBF_I2C_CAUSE_OR_CLEAR);
+	writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR);
 	/* Zero PEC byte. */
 	writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
 	/* Zero byte count. */