Message ID | 20220812145009.1229094-1-wei.fang@nxp.com |
---|---|
Headers | show |
Series | Add DT property to disable hibernation mode | expand |
> -----Original Message----- > From: Andrew Lunn <andrew@lunn.ch> > Sent: 2022年8月12日 22:15 > To: Wei Fang <wei.fang@nxp.com> > Cc: hkallweit1@gmail.com; linux@armlinux.org.uk; davem@davemloft.net; > edumazet@google.com; kuba@kernel.org; pabeni@redhat.com; > robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; f.fainelli@gmail.com; > netdev@vger.kernel.org; devicetree@vger.kernel.org; > linux-kernel@vger.kernel.org > Subject: Re: [PATCH net 1/2] dt: ar803x: Document disable-hibernation property > > On Sat, Aug 13, 2022 at 12:50:08AM +1000, wei.fang@nxp.com wrote: > > From: Wei Fang <wei.fang@nxp.com> > > > > The hibernation mode of Atheros AR803x PHYs is default enabled. > > When the cable is unplugged, the PHY will enter hibernation mode and > > the PHY clock does down. For some MACs, it needs the clock to support > > it's logic. For instance, stmmac needs the PHY inputs clock is present > > for software reset completion. Therefore, It is reasonable to add a DT > > property to disable hibernation mode. > > It is not the first time we have seen this. What you should really be > concentrating on is the clock out. That is what the MAC requires here. > > You already have the property qca,clk-out-frequency. You could maybe piggy > back off this. If that property is being used, you know the clock output is used. So > you should do what is needed to keep it ticking. > > You also have qca,keep-pll-enabled: > > If set, keep the PLL enabled even if there is no link. Useful if you > want to use the clock output without an ethernet link. > > To me, it seems like you already have enough properties, you just need to imply > that you need to disable hibernation in order to fulfil these properties. > > Andrew Hi Andrew, Your suggestion is indeed an effective solution, but I checked both the datasheet and the driver of AR803x PHYs and found that the qca,clk-out-frequency and the qca,keep-pll-enabled properties are associated with the CLK_25M pin of AR803x PHYs. But there is a case that CLK_25M pin is not used on some platforms. Taking our i.MX8DXL platform as an example, the stmmac and AR8031 PHY are applied on this platform, but the CLK_25M pin of AR8031 is not used. So when I used the method you mentioned above, it did not work as expected. In this case, we can only disable the hibernation mode of AR803x PHYs and keep the RX_CLK always outputting a valid clock so that the stmmac can complete the software reset operation.
From: Wei Fang <wei.fang@nxp.com> The patches add the ability to disable the hibernation mode of AR803x PHYs. Hibernation mode defaults to enabled after hardware reset on these PHYs. If the AR803x PHYs enter hibernation mode, they will not provide any clock. For some MACs, they might need the clocks which provided by the PHYs to support their own hardware logic. So, the patches add the supoort to disable hibernation mode by adding a boolean: qca,disable-hibernation If one wished to disable hibernation mode to better match with the specifical MAC, just add this property in the phy node of DT. Wei Fang (2): dt: ar803x: Document disable-hibernation property net: phy: at803x: Add disable hibernation mode support .../devicetree/bindings/net/qca,ar803x.yaml | 6 +++++ drivers/net/phy/at803x.c | 25 +++++++++++++++++++ 2 files changed, 31 insertions(+)