| Message ID | 20220612145955.385787-1-nikita@trvn.ru |
|---|---|
| Headers | show |
| Series | Prepare general purpose clocks on msm8916 | expand |
On Sun, 12 Jun 2022 19:59:51 +0500, Nikita Travkin wrote: > Some devices make use of general purpose clocks as PWM outputs by > controlling their duty cycle. > > Notably, many devices (e.g. Samsung A3/A5, LG G Watch R and probably > many others) use clock based PWM to control the haptic feedback, > some other can control backlight or flash/torch LED brightness. > > [...] Applied, thanks! [1/4] clk: qcom: clk-rcg2: Fail Duty-Cycle configuration if MND divider is not enabled. commit: bdafb609c3bb848d710ad9cd4debd2ee9d6a4049 [2/4] clk: qcom: clk-rcg2: Make sure to not write d=0 to the NMD register commit: d0696770cef35a1fd16ea2167e2198c18aa6fbfe [4/4] clk: qcom: gcc-msm8916: Add rates to the GP clocks commit: bf8bb8eaccf4e68d79743da631f61252753ca7cd Best regards,
Some devices make use of general purpose clocks as PWM outputs by controlling their duty cycle. Notably, many devices (e.g. Samsung A3/A5, LG G Watch R and probably many others) use clock based PWM to control the haptic feedback, some other can control backlight or flash/torch LED brightness. As a follow-up to a proposed clock based PWM output driver [1], this series contains various fixes to make it useful on msm8916 based devices. [1] - https://lore.kernel.org/lkml/20220612132203.290726-1-nikita@trvn.ru/T/#t Changes since v1: - Use clamp() instead of two boundary checks Nikita Travkin (4): clk: qcom: clk-rcg2: Fail Duty-Cycle configuration if MND divider is not enabled. clk: qcom: clk-rcg2: Make sure to not write d=0 to the NMD register pinctrl: qcom: msm8916: Allow CAMSS GP clocks to be muxed clk: qcom: gcc-msm8916: Add rates to the GP clocks drivers/clk/qcom/clk-rcg2.c | 16 +++++++++--- drivers/clk/qcom/gcc-msm8916.c | 35 ++++++++++++++++++++++++++ drivers/pinctrl/qcom/pinctrl-msm8916.c | 4 +-- 3 files changed, 49 insertions(+), 6 deletions(-)