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[v6,0/4] soc/arm64: qcom: Add initial version of bwmon

Message ID 20220629140302.236715-1-krzysztof.kozlowski@linaro.org
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Series soc/arm64: qcom: Add initial version of bwmon | expand

Message

Krzysztof Kozlowski June 29, 2022, 2:02 p.m. UTC 
Hi,

Changes since v5
================
1. Rename compatible (and files) to qcom,msm8998-llcc-bwmon as Rajendra suggested.
   Keep the reviews/acks as the change is not significant.
2. Update comment in DTS, update description in bindings and in Kconfig.

Changes since v4
================
1. Patch #1 (binding): Use qcom,msm8998-cpu-bwmon fallback compatible, only one
   interconnect. Rename to qcom,msm8998-cpu-bwmon.yaml. This reflects
   discussion with Bjorn, about the proper fallback compatible. Driver was
   tested only on SDM845, so only that one compatible is actually implemented.
   Keep the reviews/acks as the change is not significant.
2. Patch #4 (DTS): Use qcom,msm8998-cpu-bwmon fallback compatible, only one
   interconnect, use the LLCC bandwidth in OPP.

remove unused irq_enable (kbuild robot);
Changes since v3
================
1. Patch #2 (bwmon): remove unused irq_enable (kbuild robot);
   split bwmon_clear() into clearing counters and interrupts, so bwmon_start()
   does not clear the counters twice.

Changes since v2
================
1. Spent a lot of time on benchmarking and learning the BWMON behavior.
2. Drop PM/OPP patch - applied.
3. Patch #1: drop opp-avg-kBps.
4. Patch #2: Add several comments explaining pieces of code and BWMON, extend
   commit msg with measurements, extend help message, add new #defines to document
   some magic values, reorder bwmon clear/disable/enable operations to match
   downstream source and document this with comments, fix unit count from 1 MB
   to 65 kB.
5. Patch #4: drop opp-avg-kBps.
6. Add accumulated Rb tags.

Changes since v1
================
1. Add defconfig change.
2. Fix missing semicolon in MODULE_AUTHOR.
3. Add original downstream (msm-4.9 tree) copyrights to the driver.

Description
===========
BWMON is a data bandwidth monitor providing throughput/bandwidth over certain
interconnect links in a SoC.  It might be used to gather current bus usage and
vote for interconnect bandwidth, thus adjusting the bus speed based on actual
usage.

The work is built on top of Thara Gopinath's patches with several cleanups,
changes and simplifications.

Cc: Rajendra Nayak <quic_rjendra@quicinc.com>

Best regards,
Krzysztof

Krzysztof Kozlowski (4):
  dt-bindings: interconnect: qcom,msm8998-cpu-bwmon: add BWMON device
  soc: qcom: icc-bwmon: Add bandwidth monitoring driver
  arm64: defconfig: enable Qualcomm Bandwidth Monitor
  arm64: dts: qcom: sdm845: Add CPU BWMON

 .../interconnect/qcom,msm8998-llcc-bwmon.yaml |  85 ++++
 MAINTAINERS                                   |   7 +
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  37 ++
 arch/arm64/configs/defconfig                  |   1 +
 drivers/soc/qcom/Kconfig                      |  15 +
 drivers/soc/qcom/Makefile                     |   1 +
 drivers/soc/qcom/icc-bwmon.c                  | 421 ++++++++++++++++++
 7 files changed, 567 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,msm8998-llcc-bwmon.yaml
 create mode 100644 drivers/soc/qcom/icc-bwmon.c

Comments

Krzysztof Kozlowski June 30, 2022, 11:23 a.m. UTC | #1 
On 30/06/2022 13:14, Rajendra Nayak wrote:
> 
> On 6/29/2022 7:32 PM, Krzysztof Kozlowski wrote:
>> Add bindings for the Qualcomm Bandwidth Monitor device providing
>> performance data on interconnects.  The bindings describe only BWMON CPU
>> (version 4), e.g. the instance which appeared for the first on Qualcomm
>> MSM8998 SoC and is also used on SDM845.  This BWMON device sits between
>> CPU and Last Level Cache Controller.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Acked-by: Georgi Djakov <djakov@kernel.org>
>> ---
>>   .../interconnect/qcom,msm8998-llcc-bwmon.yaml | 85 +++++++++++++++++++
>>   1 file changed, 85 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,msm8998-llcc-bwmon.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-llcc-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-llcc-bwmon.yaml
>> new file mode 100644
>> index 000000000000..76e09658d615
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-llcc-bwmon.yaml
>> @@ -0,0 +1,85 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-llcc-bwmon.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Interconnect Bandwidth Monitor
>> +
>> +maintainers:
>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> +
>> +description: |
>> +  Bandwidth Monitor measures current throughput on buses between various NoC
>> +  fabrics and provides information when it crosses configured thresholds.
>> +
>> +  Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
>> +   - Measuring the bandwidth between CPUs and Last Level Cache Controller -
>> +     called LLCC BWMON,
>> +   - Measuring the bandwidth between Last Level Cache Controller and memory (DDR).
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - items:
>> +          - enum:
>> +              - qcom,sdm845-llcc-bwmon
>> +          - const: qcom,msm8998-llcc-bwmon
>> +      - const: qcom,msm8998-llcc-bwmon       # BWMON v4
>> +
>> +  interconnects:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +  operating-points-v2: true
>> +  opp-table: true
>> +
>> +  reg:
>> +    # BWMON v4 (currently described) and BWMON v5 use one register address
>> +    # space.  BWMON v2 uses two register spaces - not yet described.
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - interconnects
>> +  - interrupts
>> +  - operating-points-v2
>> +  - opp-table
>> +  - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/interconnect/qcom,sdm845.h>
>> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +
>> +    pmu@1436400 {
>> +        compatible = "qcom,sdm845-llcc-bwmon", "qcom,msm8998-llcc-bwmon";
> 
> so with this compatible fallback scheme, I am trying to understand what
> do I need to do if I have to add support for another SoC for instance.
> 
> I just update the binding with the new SoC compatible (lets say qcom,sc7280-llcc-bwmon)
> and in the device tree node use it as
> 	compatible = "qcom,sc7280-llcc-bwmon", "qcom,sdm845-llcc-bwmon", "qcom,msm8998-llcc-bwmon";
> without any updates in the driver?

I expect:
"qcom,sc7280-llcc-bwmon", "qcom,msm8998-llcc-bwmon";
and you need to add sc7280 compatible to the driver. The actual proper
solution in my patch would be to use msm8998 compatible in the driver,
but I did not test MSM8998.

Maybe we should switch to that anyway?

Best regards,
Krzysztof
Krzysztof Kozlowski June 30, 2022, 11:52 a.m. UTC | #2 
On 30/06/2022 13:29, Rajendra Nayak wrote:
>>> I just update the binding with the new SoC compatible (lets say qcom,sc7280-llcc-bwmon)
>>> and in the device tree node use it as
>>> 	compatible = "qcom,sc7280-llcc-bwmon", "qcom,sdm845-llcc-bwmon", "qcom,msm8998-llcc-bwmon";
>>> without any updates in the driver?
>>
>> I expect:
>> "qcom,sc7280-llcc-bwmon", "qcom,msm8998-llcc-bwmon";
>> and you need to add sc7280 compatible to the driver. The actual proper
>> solution in my patch would be to use msm8998 compatible in the driver,
>> but I did not test MSM8998.
>>
>> Maybe we should switch to that anyway?
> 
> Right, looks like without it every new SoC compatible added would need a dummy
> update in the driver even though you really don't need to do anything different
> in the driver.

OK, then v7 is coming :)

Best regards,
Krzysztof