| Message ID | 20220624101736.27217-2-phil.edworthy@renesas.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i2c: Add new driver for Renesas RZ/V2M controller | expand |
On 24/06/2022 12:17, Phil Edworthy wrote: > Document Renesas RZ/V2M (r9a09g011) I2C controller bindings. > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > .../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > > diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > new file mode 100644 > index 000000000000..9049461ad2f4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Renesas RZ/V2M I2C Bus Interface > + > +maintainers: > + - Phil Edworthy <phil.edworthy@renesas.com> > + > +allOf: > + - $ref: /schemas/i2c/i2c-controller.yaml# > + > +properties: > + compatible: > + items: > + - enum: > + - renesas,i2c-r9a09g011 # RZ/V2M > + - const: renesas,rzv2m-i2c > + > + reg: > + maxItems: 1 > + > + interrupts: > + items: > + - description: Data transmission/reception interrupt > + - description: Status interrupt > + > + interrupt-names: > + items: > + - const: tia > + - const: tis > + > + clock-frequency: > + description: > + Desired I2C bus clock frequency in Hz. The absence of this property > + indicates the default frequency 100 kHz. Instead of last sentence, just add "default: 100000". > + > + clocks: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-names > + - clocks > + - power-domains > + - resets This was not mentioned in properties. Why? > + - '#address-cells' > + - '#size-cells' > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/r9a09g011-cpg.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + i2c0: i2c@a4030000 { > + compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c"; > + reg = <0xa4030000 0x80>; > + interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>, > + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "tia", "tis"; > + clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>; > + resets = <&cpg R9A09G011_IIC_GPA_PRESETN>; > + power-domains = <&cpg>; > + clock-frequency = <100000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; Best regards, Krzysztof
Hi Krzysztof, Thanks for you review. On 25 June 2022 21:43 Krzysztof Kozlowski wrote: > On 24/06/2022 12:17, Phil Edworthy wrote: > > Document Renesas RZ/V2M (r9a09g011) I2C controller bindings. > > > > Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > .../bindings/i2c/renesas,rzv2m.yaml | 76 +++++++++++++++++++ > > 1 file changed, 76 insertions(+) > > create mode 100644 > Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > > > > diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > > new file mode 100644 > > index 000000000000..9049461ad2f4 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml > > @@ -0,0 +1,76 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Renesas RZ/V2M I2C Bus Interface > > + > > +maintainers: > > + - Phil Edworthy <phil.edworthy@renesas.com> > > + > > +allOf: > > + - $ref: /schemas/i2c/i2c-controller.yaml# > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - renesas,i2c-r9a09g011 # RZ/V2M > > + - const: renesas,rzv2m-i2c > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: Data transmission/reception interrupt > > + - description: Status interrupt > > + > > + interrupt-names: > > + items: > > + - const: tia > > + - const: tis > > + > > + clock-frequency: > > + description: > > + Desired I2C bus clock frequency in Hz. The absence of this > property > > + indicates the default frequency 100 kHz. > > Instead of last sentence, just add "default: 100000". Right, I'll also and an enum for this as the HW can only support 100 or 400kHz. > > + > > + clocks: > > + maxItems: 1 > > + > > + power-domains: > > + maxItems: 1 > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - interrupt-names > > + - clocks > > + - power-domains > > + - resets > > This was not mentioned in properties. Why? Oops, I'll add it. > > + - '#address-cells' > > + - '#size-cells' > > + > > +unevaluatedProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/r9a09g011-cpg.h> > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > + i2c0: i2c@a4030000 { > > + compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c"; > > + reg = <0xa4030000 0x80>; > > + interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>, > > + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; > > + interrupt-names = "tia", "tis"; > > + clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>; > > + resets = <&cpg R9A09G011_IIC_GPA_PRESETN>; > > + power-domains = <&cpg>; > > + clock-frequency = <100000>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; Thanks Phil
diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml new file mode 100644 index 000000000000..9049461ad2f4 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M I2C Bus Interface + +maintainers: + - Phil Edworthy <phil.edworthy@renesas.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + items: + - enum: + - renesas,i2c-r9a09g011 # RZ/V2M + - const: renesas,rzv2m-i2c + + reg: + maxItems: 1 + + interrupts: + items: + - description: Data transmission/reception interrupt + - description: Status interrupt + + interrupt-names: + items: + - const: tia + - const: tis + + clock-frequency: + description: + Desired I2C bus clock frequency in Hz. The absence of this property + indicates the default frequency 100 kHz. + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - power-domains + - resets + - '#address-cells' + - '#size-cells' + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a09g011-cpg.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + i2c0: i2c@a4030000 { + compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c"; + reg = <0xa4030000 0x80>; + interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "tia", "tis"; + clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>; + resets = <&cpg R9A09G011_IIC_GPA_PRESETN>; + power-domains = <&cpg>; + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; + };