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[v2,09/20] dt-bindings: reset: npcm: add GCR syscon property

Message ID 20220608095623.22327-10-tmaimon77@gmail.com
State Superseded
Headers show
Series [v2,01/20] clocksource: timer-npcm7xx: Add NPCM845 timer | expand

Commit Message

Tomer Maimon June 8, 2022, 9:56 a.m. UTC
Describe syscon property that handles general
control registers(GCR) in Nuvoton BMC NPCM
reset driver.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
 .../devicetree/bindings/reset/nuvoton,npcm-reset.yaml       | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Rob Herring (Arm) June 8, 2022, 9:48 p.m. UTC | #1
On Wed, 08 Jun 2022 12:56:12 +0300, Tomer Maimon wrote:
> Describe syscon property that handles general
> control registers(GCR) in Nuvoton BMC NPCM
> reset driver.
> 
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
>  .../devicetree/bindings/reset/nuvoton,npcm-reset.yaml       | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.

Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.

Full log is available here: https://patchwork.ozlabs.org/patch/


rstc@f0801000: 'nuvoton,sysgcr' is a required property
	arch/arm/boot/dts/nuvoton-npcm730-gbs.dtb
	arch/arm/boot/dts/nuvoton-npcm730-gsj.dtb
	arch/arm/boot/dts/nuvoton-npcm730-kudo.dtb
	arch/arm/boot/dts/nuvoton-npcm750-evb.dtb
	arch/arm/boot/dts/nuvoton-npcm750-runbmc-olympus.dtb
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Patch

diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
index 0998f481578d..c6bbc1589ab9 100644
--- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
@@ -19,6 +19,10 @@  properties:
   '#reset-cells':
     const: 2
 
+  nuvoton,sysgcr:
+    $ref: "/schemas/types.yaml#/definitions/phandle"
+    description: a phandle to access GCR registers.
+
   nuvoton,sw-reset-number:
     $ref: /schemas/types.yaml#/definitions/uint32
     minimum: 1
@@ -31,6 +35,7 @@  required:
   - compatible
   - reg
   - '#reset-cells'
+  - nuvoton,sysgcr
 
 additionalProperties: false
 
@@ -41,6 +46,7 @@  examples:
         compatible = "nuvoton,npcm750-reset";
         reg = <0xf0801000 0x70>;
         #reset-cells = <2>;
+        nuvoton,sysgcr = <&gcr>;
         nuvoton,sw-reset-number = <2>;
     };