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[0/3] Enable RPi header on j721e sk

Message ID 20220527083556.18864-1-r-ravikumar@ti.com
Headers show
Series Enable RPi header on j721e sk | expand

Message

Rahul T R May 27, 2022, 8:35 a.m. UTC 
The following series of patches enables RPi header
on j721e sk. It is a 40 pin io expasion header which
brings out i2c5, ehrpwm 2,3 and some pins of gpio 0,1

Rahul T R (1):
  dt-bindings: mfd: ti,j721e-system-controller: Add clock property

Sinthu Raja (1):
  arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header

Vijay Pothukuchi (1):
  arm64: dts: ti: k3-j721e-*: Add dts nodes for EHRPWMs

 .../mfd/ti,j721e-system-controller.yaml       |  12 +++
 .../dts/ti/k3-j721e-common-proc-board.dts     |  24 +++++
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     |  62 ++++++++++-
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 101 +++++++++++++++++-
 4 files changed, 193 insertions(+), 6 deletions(-)

Comments

Krzysztof Kozlowski May 29, 2022, 2:14 p.m. UTC | #1 
On 27/05/2022 10:35, Rahul T R wrote:
> Add a pattern property for clock, also update the example with
> a clock node
> 
> Signed-off-by: Rahul T R <r-ravikumar@ti.com>
> ---
>  .../bindings/mfd/ti,j721e-system-controller.yaml     | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> index fa86691ebf16..e774a7f0bb08 100644
> --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> @@ -48,6 +48,12 @@ patternProperties:
>      description:
>        This is the SERDES lane control mux.
>  
> +  "^clock@[0-9a-f]+$":
> +    type: object
> +    $ref: ../clock/ti,am654-ehrpwm-tbclk.yaml#

Full path please, so /schemas/clock/.......

> +    description:
> +      This is TI syscon gate clk.

Don't use "This is". Just describe it without need of full sentence.
"syscon gate clock" is a bit unspecific and actually looks like you
describe "clocks" property...

> +
>  required:
>    - compatible
>    - reg
> @@ -79,5 +85,11 @@ examples:
>                  <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
>                  /* SERDES4 lane0/1/2/3 select */
>          };
> +
> +        ehrpwm_tbclk: clock@4140 {

No need for label.

> +                compatible = "ti,am654-ehrpwm-tbclk", "syscon";

Messed up indentation.

> +                reg = <0x4140 0x18>;
> +                #clock-cells = <1>;
> +        };
>      };
>  ...


Best regards,
Krzysztof
Rahul T R May 30, 2022, 7:33 a.m. UTC | #2 
On 16:14-20220529, Krzysztof Kozlowski wrote:
> On 27/05/2022 10:35, Rahul T R wrote:
> > Add a pattern property for clock, also update the example with
> > a clock node
> > 
> > Signed-off-by: Rahul T R <r-ravikumar@ti.com>
> > ---
> >  .../bindings/mfd/ti,j721e-system-controller.yaml     | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> > index fa86691ebf16..e774a7f0bb08 100644
> > --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> > +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
> > @@ -48,6 +48,12 @@ patternProperties:
> >      description:
> >        This is the SERDES lane control mux.
> >  
> > +  "^clock@[0-9a-f]+$":
> > +    type: object
> > +    $ref: ../clock/ti,am654-ehrpwm-tbclk.yaml#

Thanks Krzysztof,

Will address the review comments and send a v2
of this

Regards
Rahul T R

> 
> Full path please, so /schemas/clock/.......
> 
> > +    description:
> > +      This is TI syscon gate clk.
> 
> Don't use "This is". Just describe it without need of full sentence.
> "syscon gate clock" is a bit unspecific and actually looks like you
> describe "clocks" property...
> 
> > +
> >  required:
> >    - compatible
> >    - reg
> > @@ -79,5 +85,11 @@ examples:
> >                  <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
> >                  /* SERDES4 lane0/1/2/3 select */
> >          };
> > +
> > +        ehrpwm_tbclk: clock@4140 {
> 
> No need for label.
> 
> > +                compatible = "ti,am654-ehrpwm-tbclk", "syscon";
> 
> Messed up indentation.
> 
> > +                reg = <0x4140 0x18>;
> > +                #clock-cells = <1>;
> > +        };
> >      };
> >  ...
> 
> 
> Best regards,
> Krzysztof