diff mbox series

[v4,13/17] target/m68k: Implement FTRAPcc

Message ID 20220430175342.370628-14-richard.henderson@linaro.org
State Superseded
Headers show
Series target/m68k: Conditional traps + trap cleanup | expand

Commit Message

Richard Henderson April 30, 2022, 5:53 p.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

Comments

Laurent Vivier May 25, 2022, 9:51 p.m. UTC | #1
Le 30/04/2022 à 19:53, Richard Henderson a écrit :
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/m68k/translate.c | 30 ++++++++++++++++++++++++++++++
>   1 file changed, 30 insertions(+)
> 
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index 0cd7ef89e3..a3141d7f77 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -5567,6 +5567,35 @@ DISAS_INSN(fscc)
>       tcg_temp_free(tmp);
>   }
>   
> +DISAS_INSN(ftrapcc)
> +{
> +    DisasCompare c;
> +    uint16_t ext;
> +    int cond;
> +
> +    ext = read_im16(env, s);
> +    cond = ext & 0x3f;
> +
> +    /* Consume and discard the immediate operand. */
> +    switch (extract32(insn, 0, 3)) {
> +    case 2: /* ftrapcc.w */
> +        (void)read_im16(env, s);
> +        break;
> +    case 3: /* ftrapcc.l */
> +        (void)read_im32(env, s);
> +        break;
> +    case 4: /* ftrapcc (no operand) */
> +        break;
> +    default:
> +        /* Illegal insn */
> +        disas_undef(env, s, insn);
> +        return;
> +    }
> +
> +    gen_fcc_cond(&c, s, cond);
> +    do_trapcc(s, &c);
> +}
> +
>   #if defined(CONFIG_SOFTMMU)
>   DISAS_INSN(frestore)
>   {
> @@ -6190,6 +6219,7 @@ void register_m68k_insns (CPUM68KState *env)
>       INSN(fbcc,      f280, ffc0, CF_FPU);
>       INSN(fpu,       f200, ffc0, FPU);
>       INSN(fscc,      f240, ffc0, FPU);
> +    INSN(ftrapcc,   f278, fff8, FPU);
>       INSN(fbcc,      f280, ff80, FPU);
>   #if defined(CONFIG_SOFTMMU)
>       INSN(frestore,  f340, ffc0, CF_FPU);

Reviewed-by: Laurent Vivier <laurent@vivier.eu>
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 0cd7ef89e3..a3141d7f77 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5567,6 +5567,35 @@  DISAS_INSN(fscc)
     tcg_temp_free(tmp);
 }
 
+DISAS_INSN(ftrapcc)
+{
+    DisasCompare c;
+    uint16_t ext;
+    int cond;
+
+    ext = read_im16(env, s);
+    cond = ext & 0x3f;
+
+    /* Consume and discard the immediate operand. */
+    switch (extract32(insn, 0, 3)) {
+    case 2: /* ftrapcc.w */
+        (void)read_im16(env, s);
+        break;
+    case 3: /* ftrapcc.l */
+        (void)read_im32(env, s);
+        break;
+    case 4: /* ftrapcc (no operand) */
+        break;
+    default:
+        /* Illegal insn */
+        disas_undef(env, s, insn);
+        return;
+    }
+
+    gen_fcc_cond(&c, s, cond);
+    do_trapcc(s, &c);
+}
+
 #if defined(CONFIG_SOFTMMU)
 DISAS_INSN(frestore)
 {
@@ -6190,6 +6219,7 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(fbcc,      f280, ffc0, CF_FPU);
     INSN(fpu,       f200, ffc0, FPU);
     INSN(fscc,      f240, ffc0, FPU);
+    INSN(ftrapcc,   f278, fff8, FPU);
     INSN(fbcc,      f280, ff80, FPU);
 #if defined(CONFIG_SOFTMMU)
     INSN(frestore,  f340, ffc0, CF_FPU);