| Message ID | 20220514190138.3179964-1-dmitry.baryshkov@linaro.org |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: initial Inforce IFC6560 board support | expand |
On 2022-05-14 22:01:27, Dmitry Baryshkov wrote: > Follow the typical practice and keep DSI0/DSI0 PHY disabled by default. > They should be enabled in the board DT files. No existing boards use > them at this moment. > > Suggested-by: Marijn Suijten <marijn.suijten@somainline.org> > Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > arch/arm64/boot/dts/qcom/sdm630.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index 240293592ef9..8697d40e9b74 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -1559,6 +1559,8 @@ dsi0: dsi@c994000 { > phys = <&dsi0_phy>; > phy-names = "dsi"; > > + status = "disabled"; > + > ports { > #address-cells = <1>; > #size-cells = <0>; > @@ -1592,6 +1594,7 @@ dsi0_phy: dsi-phy@c994400 { > > clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>; > clock-names = "iface", "ref"; > + status = "disabled"; > }; > }; > > -- > 2.35.1 >
On Sun, 15 May 2022 at 17:56, Marijn Suijten <marijn.suijten@somainline.org> wrote: > > On 2022-05-14 22:01:37, Dmitry Baryshkov wrote: > > The IFC6560 is a board from Inforce Computing, built around the SDA660 > > SoC. This patch describes core clocks, some regulators from the two > > PMICs, debug uart, storage, bluetooth and audio DSP remoteproc. > > > > The regulator settings are inherited from prior work by Konrad Dybcio > > and AngeloGioacchino Del Regno. > > > > Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > I don't own this board nor a reference manual, but have scrutinized this > patch enough (and compared it against the status-quo in other sd*6** > dts files) to dare and give it my: > > Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > > > --- > > arch/arm64/boot/dts/qcom/Makefile | 1 + > > .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 461 ++++++++++++++++++ > > 2 files changed, 462 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > index f9e6343acd03..5f717fe0e8d0 100644 > > --- a/arch/arm64/boot/dts/qcom/Makefile > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > @@ -88,6 +88,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-herobrine-r1.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sc7280-crd.dtb > > +dtb-$(CONFIG_ARCH_QCOM) += sda660-inforce-ifc6560.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-discovery.dtb > > dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-pioneer.dtb > > diff --git a/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts > > new file mode 100644 > > index 000000000000..5360b56df045 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts > > @@ -0,0 +1,461 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2021, Linaro Ltd. > > + * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org> > > + * Copyright (c) 2020, AngeloGioacchino Del Regno > > + * <angelogioacchino.delregno@somainline.org> > > These are only for the regulator configuration, which typically depend > on the board and should not be copied or inherited from a different > board? Not sure, they existed in Bjorn's patch. And I'm not in the position to remove existing copyrights. So I've left them in place even if they are for the regulators. > > - Marijn > > > + */ > > + > > +/dts-v1/; > > + > > +#include "sdm660.dtsi" > > +#include "pm660.dtsi" > > +#include "pm660l.dtsi" > > + > > +/ { > > + model = "Inforce 6560 Single Board Computer"; > > + compatible = "inforce,ifc6560", "qcom,sda660"; > > + chassis-type = "embedded"; /* SBC */ > > + > > + aliases { > > + serial0 = &blsp1_uart2; > > + serial1 = &blsp2_uart1; > > + }; > > + > > + chosen { > > + stdout-path = "serial0:115200n8"; > > + }; > > + > > + gpio-keys { > > + compatible = "gpio-keys"; > > + > > + volup { > > + label = "Volume Up"; > > + gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; > > + linux,code = <KEY_VOLUMEUP>; > > + debounce-interval = <15>; > > + }; > > + }; > > + > > + /* > > + * Until we hook up type-c detection, we > > + * have to stick with this. But it works. > > + */ > > + extcon_usb: extcon-usb { > > + compatible = "linux,extcon-usb-gpio"; > > + id-gpio = <&tlmm 58 GPIO_ACTIVE_HIGH>; > > + }; > > + > > + hdmi-out { > > + compatible = "hdmi-connector"; > > + type = "a"; > > + > > + port { > > + hdmi_con: endpoint { > > + remote-endpoint = <&adv7533_out>; > > + }; > > + }; > > + }; > > + > > + vph_pwr: vph-pwr-regulator { > > + compatible = "regulator-fixed"; > > + regulator-name = "vph_pwr"; > > + regulator-min-microvolt = <3800000>; > > + regulator-max-microvolt = <3800000>; > > + > > + regulator-always-on; > > + regulator-boot-on; > > + }; > > + > > + v3p3_bck_bst: v3p3-bck-bst-regulator { > > + compatible = "regulator-fixed"; > > + regulator-name = "v3p3_bck_bst"; > > + > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3300000>; > > + > > + vin-supply = <&vph_pwr>; > > + }; > > + > > + v1p2_ldo: v1p2-ldo-regulator { > > + compatible = "regulator-fixed"; > > + regulator-name = "v1p2_ldo"; > > + > > + regulator-min-microvolt = <1200000>; > > + regulator-max-microvolt = <1200000>; > > + > > + vin-supply = <&vph_pwr>; > > + }; > > + > > + v5p0_boost: v5p0-boost-regulator { > > + compatible = "regulator-fixed"; > > + regulator-name = "v5p0_boost"; > > + > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + > > + vin-supply = <&vph_pwr>; > > + }; > > +}; > > + > > +&adsp_pil { > > + firmware-name = "qcom/ifc6560/adsp.mbn"; > > +}; > > + > > +&blsp1_dma { > > + /* > > + * The board will lock up if we toggle the BLSP clock, unless the > > + * BAM DMA interconnects support is in place. > > + */ > > + /delete-property/ clocks; > > +}; > > + > > +&blsp_i2c6 { > > + status = "okay"; > > + > > + adv7533: hdmi@39 { > > + compatible = "adi,adv7535"; > > + reg = <0x39>, <0x66>; > > + reg-names = "main", "edid"; > > + > > + interrupt-parent = <&pm660l_gpios>; > > + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; > > + > > + clocks = <&rpmcc RPM_SMD_BB_CLK2>; > > + clock-names = "cec"; > > + /* > > + * Limit to 3 lanes to prevent the bridge from changing amount > > + * of lanes in the fly. MSM DSI host doesn't like that. > > + */ > > + adi,dsi-lanes = <3>; > > + avdd-supply = <&vreg_l13a_1p8>; > > + dvdd-supply = <&vreg_l13a_1p8>; > > + pvdd-supply = <&vreg_l13a_1p8>; > > + a2vdd-supply = <&vreg_l13a_1p8>; > > + v3p3-supply = <&v3p3_bck_bst>; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + adv7533_in: endpoint { > > + remote-endpoint = <&dsi0_out>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + adv7533_out: endpoint { > > + remote-endpoint = <&hdmi_con>; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&blsp1_uart2 { > > + status = "okay"; > > +}; > > + > > +&blsp2_dma { > > + /* > > + * The board will lock up if we toggle the BLSP clock, unless the > > + * BAM DMA interconnects support is in place. > > + */ > > + /delete-property/ clocks; > > +}; > > + > > +&blsp2_uart1 { > > + status = "okay"; > > + > > + bluetooth { > > + compatible = "qcom,wcn3990-bt"; > > + > > + vddio-supply = <&vreg_l13a_1p8>; > > + vddxo-supply = <&vreg_l9a_1p8>; > > + vddrf-supply = <&vreg_l6a_1p3>; > > + vddch0-supply = <&vreg_l19a_3p3>; > > + max-speed = <3200000>; > > + }; > > +}; > > + > > +&dsi0 { > > + status = "okay"; > > + vdda-supply = <&vreg_l1a_1p225>; > > +}; > > + > > +&dsi0_out { > > + remote-endpoint = <&adv7533_in>; > > + data-lanes = <0 1 2 3>; > > +}; > > + > > +&dsi0_phy { > > + status = "okay"; > > + vcca-supply = <&vreg_l1b_0p925>; > > +}; > > + > > +&mdss { > > + status = "okay"; > > +}; > > + > > +&mmss_smmu { > > + status = "okay"; > > +}; > > + > > +&pon_pwrkey { > > + status = "okay"; > > +}; > > + > > +&pon_resin { > > + status = "okay"; > > + > > + linux,code = <KEY_VOLUMEUP>; > > +}; > > + > > +&qusb2phy0 { > > + status = "okay"; > > + > > + vdd-supply = <&vreg_l1b_0p925>; > > + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; > > +}; > > + > > +&qusb2phy1 { > > + status = "okay"; > > + > > + vdd-supply = <&vreg_l1b_0p925>; > > + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; > > +}; > > + > > +&rpm_requests { > > + pm660-regulators { > > + compatible = "qcom,rpm-pm660-regulators"; > > + > > + vdd_s1-supply = <&vph_pwr>; > > + vdd_s2-supply = <&vph_pwr>; > > + vdd_s3-supply = <&vph_pwr>; > > + vdd_s4-supply = <&vph_pwr>; > > + vdd_s5-supply = <&vph_pwr>; > > + vdd_s6-supply = <&vph_pwr>; > > + > > + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; > > + vdd_l2_l3-supply = <&vreg_s2b_1p05>; > > + vdd_l5-supply = <&vreg_s2b_1p05>; > > + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; > > + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; > > + > > + vreg_s4a_2p04: s4 { > > + regulator-min-microvolt = <1805000>; > > + regulator-max-microvolt = <2040000>; > > + regulator-enable-ramp-delay = <200>; > > + regulator-ramp-delay = <0>; > > + regulator-always-on; > > + }; > > + > > + vreg_s5a_1p35: s5 { > > + regulator-min-microvolt = <1224000>; > > + regulator-max-microvolt = <1350000>; > > + regulator-enable-ramp-delay = <200>; > > + regulator-ramp-delay = <0>; > > + }; > > + > > + vreg_l1a_1p225: l1 { > > + regulator-min-microvolt = <1150000>; > > + regulator-max-microvolt = <1250000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l6a_1p3: l6 { > > + regulator-min-microvolt = <1304000>; > > + regulator-max-microvolt = <1368000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l8a_1p8: l8 { > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <1800000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-system-load = <325000>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l9a_1p8: l9 { > > + regulator-min-microvolt = <1804000>; > > + regulator-max-microvolt = <1896000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l13a_1p8: l13 { > > + /* This gives power to the LPDDR4: never turn it off! */ > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <1944000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-always-on; > > + regulator-boot-on; > > + }; > > + > > + vreg_l19a_3p3: l19 { > > + regulator-min-microvolt = <3312000>; > > + regulator-max-microvolt = <3400000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-allow-set-load; > > + }; > > + }; > > + > > + pm660l-regulators { > > + compatible = "qcom,rpm-pm660l-regulators"; > > + > > + vdd_s1-supply = <&vph_pwr>; > > + vdd_s2-supply = <&vph_pwr>; > > + vdd_s3_s4-supply = <&vph_pwr>; > > + vdd_s5-supply = <&vph_pwr>; > > + vdd_s6-supply = <&vph_pwr>; > > + > > + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; > > + vdd_l2-supply = <&vreg_bob>; > > + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; > > + vdd_l4_l6-supply = <&vreg_bob>; > > + vdd_bob-supply = <&vph_pwr>; > > + > > + vreg_s2b_1p05: s2 { > > + regulator-min-microvolt = <1050000>; > > + regulator-max-microvolt = <1050000>; > > + regulator-enable-ramp-delay = <200>; > > + regulator-ramp-delay = <0>; > > + }; > > + > > + vreg_l1b_0p925: l1 { > > + regulator-min-microvolt = <800000>; > > + regulator-max-microvolt = <925000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l2b_2p95: l2 { > > + regulator-min-microvolt = <1648000>; > > + regulator-max-microvolt = <3100000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l4b_2p95: l4 { > > + regulator-min-microvolt = <2944000>; > > + regulator-max-microvolt = <2952000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + > > + regulator-min-microamp = <200>; > > + regulator-max-microamp = <600000>; > > + regulator-system-load = <570000>; > > + regulator-allow-set-load; > > + }; > > + > > + /* > > + * Downstream specifies a range of 1721-3600mV, > > + * but the only assigned consumers are SDHCI2 VMMC > > + * and Coresight QPDI that both request pinned 2.95V. > > + * Tighten the range to 1.8-3.328 (closest to 3.3) to > > + * make the mmc driver happy. > > + */ > > + vreg_l5b_2p95: l5 { > > + regulator-min-microvolt = <1800000>; > > + regulator-max-microvolt = <3328000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-system-load = <800000>; > > + regulator-ramp-delay = <0>; > > + regulator-allow-set-load; > > + }; > > + > > + vreg_l7b_3p125: l7 { > > + regulator-min-microvolt = <2700000>; > > + regulator-max-microvolt = <3125000>; > > + regulator-enable-ramp-delay = <250>; > > + }; > > + > > + vreg_l8b_3p3: l8 { > > + regulator-min-microvolt = <2800000>; > > + regulator-max-microvolt = <3400000>; > > + regulator-enable-ramp-delay = <250>; > > + regulator-ramp-delay = <0>; > > + }; > > + > > + vreg_bob: bob { > > + regulator-min-microvolt = <3300000>; > > + regulator-max-microvolt = <3624000>; > > + regulator-enable-ramp-delay = <500>; > > + regulator-ramp-delay = <0>; > > + }; > > + }; > > +}; > > + > > +&sdc2_state_on { > > + sd-cd { > > + pins = "gpio54"; > > + bias-pull-up; > > + drive-strength = <2>; > > + }; > > +}; > > + > > +&sdc2_state_off { > > + sd-cd { > > + pins = "gpio54"; > > + bias-disable; > > + drive-strength = <2>; > > + }; > > +}; > > + > > +&sdhc_1 { > > + status = "okay"; > > + supports-cqe; > > + > > + vmmc-supply = <&vreg_l4b_2p95>; > > + vqmmc-supply = <&vreg_l8a_1p8>; > > + > > + mmc-ddr-1_8v; > > + mmc-hs400-1_8v; > > + mmc-hs400-enhanced-strobe; > > +}; > > + > > +&sdhc_2 { > > + status = "okay"; > > + > > + vmmc-supply = <&vreg_l5b_2p95>; > > + vqmmc-supply = <&vreg_l2b_2p95>; > > + > > + cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; > > + no-sdio; > > + no-emmc; > > +}; > > + > > +&tlmm { > > + gpio-reserved-ranges = <0 4>, <8 4>; > > +}; > > + > > +&usb2 { > > + status = "okay"; > > +}; > > + > > +&usb2_dwc3 { > > + dr_mode = "host"; > > +}; > > + > > +&usb3 { > > + status = "okay"; > > +}; > > + > > +&usb3_dwc3 { > > + dr_mode = "peripheral"; > > + extcon = <&extcon_usb>; > > +}; > > -- > > 2.35.1 > >
his work is largely based on the previous work by Bjorn Andersson ([1]) Changes since v3: - Remove unused mdp and sd-card-det-n DT nodes from the ifc6560 dts (thanks to Konrad). Changes since v3 (most points based on review by Marijn): - Fixed a typo in dsi0 patch - Fixed indentation here and there - Renamed qusb2phy to qusb2phy0 to play better with qusb2phy1 - Fixed the ICC path for the GPU - Fixed sdhc2 pinconf for sdm636-sony-xperia-ganges-mermaid - Moved SDHC2 card detect gpio pin to board files Changes since v2: - Removed useless enablement of mdp node from the board file. It is already enabled in the SoC dtsi file. Changes since v1 (mostly based on Kondrad's review): - Also disabled dsi0/dsi0 phy in sdm630.dtsi - Removed the clock from BAM DMA devices rather than disabling them completely - Replaced numbers with symbolic names for interconnects in sdm630.dtsi - Switched to "qcom,sda660" as a fallback compatible string - Added dt-bindings for the qcom,sda660 compat - Removed extra nesting level from the adsp firmware path - Replaced numbers with proper symbolic names in the board file - Added chassis-type property - Changed the order of blsp entries in the board file - Removed spurious newlines - Changed the order of regulator properties - Changed the DSI data-lines to list all four lanes. Still use just three lanes for the adv bridge (and describe the reason in the comment) Changes since Bjorn's v2: - Disable dsi1, dsi1 phy, GPU by default in sdm660.dtsi/sdm630.dtsi - Fix qusb2phy ref clock - Added USB2 host support to sdm630.dtsi - Renamed DTS to follow SoC-vendor-board pattern - Fixed vph_pwr voltage - Removed extra/unrelated comments - Added keys, USB2, USB3, - Added configuration for the attached HDMI bridge - Enabled MDP, MDSS and DSI0/DSI0 PHY devices - Removed uart pinctrl and /reserved-mem nodes (present in main dtsi file) - Added card detection for the SDCC2 - Disabled BLSP BAM DMA devices, they make the board reset during boot [1] https://lore.kernel.org/linux-arm-msm/20210825221110.1498718-1-bjorn.andersson@linaro.org/#t Dmitry Baryshkov (12): arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default arm64: dts: qcom: sdm630: disable GPU by default arm64: dts: qcom: sdm630: fix the qusb2phy ref clock arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 arm64: dts: qcom: sdm630: add second (HS) USB host support arm64: dts: qcom: sdm630: fix gpu's interconnect path arm64: dts: qcom: sdm630: use defined symbols for interconnects arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov (12): arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy by default arm64: dts: qcom: sdm630: disable GPU by default arm64: dts: qcom: sdm630: fix the qusb2phy ref clock arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 arm64: dts: qcom: sdm630: add second (HS) USB host support arm64: dts: qcom: sdm630: fix gpu's interconnect path arm64: dts: qcom: sdm630: use defined symbols for interconnects arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board .../devicetree/bindings/arm/qcom.yaml | 6 + arch/arm64/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/sda660-inforce-ifc6560.dts | 461 ++++++++++++++++++ .../dts/qcom/sdm630-sony-xperia-nile.dtsi | 18 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 101 +++- .../sdm636-sony-xperia-ganges-mermaid.dts | 2 +- .../boot/dts/qcom/sdm660-xiaomi-lavender.dts | 18 +- arch/arm64/boot/dts/qcom/sdm660.dtsi | 3 + 8 files changed, 581 insertions(+), 29 deletions(-) create mode 100644 arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts