| Message ID | 20220503194546.1287679-1-matthew.gerlach@linux.intel.com |
|---|---|
| Headers | show |
| Series | Add device tree for Intel n6000 | expand |
On Wed, 4 May 2022, Krzysztof Kozlowski wrote: > On 03/05/2022 21:45, matthew.gerlach@linux.intel.com wrote: >> From: Matthew Gerlach <matthew.gerlach@linux.intel.com> >> >> Add a device tree for the n6000 instantiation of Agilex >> Hard Processor System (HPS). >> >> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> > >> + >> + soc { >> + agilex_hps_bridges: bus@80000000 { >> + compatible = "simple-bus"; >> + reg = <0x80000000 0x60000000>, >> + <0xf9000000 0x00100000>; >> + reg-names = "axi_h2f", "axi_h2f_lw"; >> + #address-cells = <0x2>; >> + #size-cells = <0x1>; >> + ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>; >> + >> + hps_cp_eng@0 { > > No underscores in node names. dtc W=1 should complain about it. I will remove the underscores in the name. I didn't see a complaint when I compiled it with "make W=1" in the kernel tree. > The node name should be generic, matching class of a device. What is > this exactly? The component is a specialized IP block instantiated in the FPGA directly connected to the HPS. In one sense the IP block is a simple DMA controller, but it also has some registers for hand shaking between the HPS and a host processor connected to the FPGA via PCIe. Should I call the node, dma@0? Thanks for your review, Matthew > > Best regards, > Krzysztof >
From: Matthew Gerlach <matthew.gerlach@linux.intel.com> This patch set adds a device tree for the Hard Processor System (HPS) on an Agilex based Intel n6000 board. Patch 1 defines the device tree binding for the HPS Copy Engine IP used to copy a bootable image from host memory to HPS DDR. Patch 2 defines the binding for the Intel n6000 board itself. Patch 3 adds the device tree for the n6000 board. Changelog v1 -> v2: - add dt binding for copy enging - add dt binding for n6000 board - fix copy engine node name - fix compatible field for copy engine - remove redundant status field - add compatibility field for the board - fix SPDX - fix how osc1 clock frequency is set Matthew Gerlach (3): dt-bindings: misc: add bindings for Intel HPS Copy Engine dt-bindings: intel: add binding for Intel n6000 arm64: dts: intel: add device tree for n6000 .../bindings/arm/intel,socfpga.yaml | 1 + .../bindings/misc/intel,hps-copy-engine.yaml | 48 ++++++++++++ arch/arm64/boot/dts/intel/Makefile | 3 +- .../boot/dts/intel/socfpga_agilex_n6000.dts | 76 +++++++++++++++++++ 4 files changed, 127 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/misc/intel,hps-copy-engine.yaml create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts