Message ID | 20220420073440.31649-1-irui.wang@mediatek.com |
---|---|
State | New |
Headers | show |
Series | dt-bindings: media: mtk-vcodec: Adds encoder power domain property | expand |
On Wed, 20 Apr 2022 15:34:39 +0800, Irui Wang wrote: > Adds encoder power domain property > > Signed-off-by: Irui Wang <irui.wang@mediatek.com> > --- > .../devicetree/bindings/media/mediatek,vcodec-encoder.yaml | 7 +++++++ > 1 file changed, 7 insertions(+) > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ vcodec@18002000: 'mediatek,larb' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/mediatek/mt8173-elm.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dtb arch/arm64/boot/dts/mediatek/mt8173-evb.dtb vcodec@18002000: 'power-domains' is a required property arch/arm64/boot/dts/mediatek/mt8173-elm.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dtb arch/arm64/boot/dts/mediatek/mt8173-evb.dtb vcodec@19002000: 'mediatek,larb' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/mediatek/mt8173-elm.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dtb arch/arm64/boot/dts/mediatek/mt8173-evb.dtb vcodec@19002000: 'power-domains' is a required property arch/arm64/boot/dts/mediatek/mt8173-elm.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtb arch/arm64/boot/dts/mediatek/mt8173-elm-hana-rev7.dtb arch/arm64/boot/dts/mediatek/mt8173-evb.dtb
On Wed, Apr 20, 2022 at 03:34:39PM +0800, Irui Wang wrote: > Adds encoder power domain property Why? You can't add new, required properties as that breaks compatibility with existing DTs. > > Signed-off-by: Irui Wang <irui.wang@mediatek.com> > --- > .../devicetree/bindings/media/mediatek,vcodec-encoder.yaml | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml > index deb5b657a2d5..3c069c965992 100644 > --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml > +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml > @@ -41,6 +41,9 @@ properties: > > assigned-clock-parents: true > > + power-domains: > + maxItems: 1 > + > iommus: > minItems: 1 > maxItems: 32 > @@ -72,6 +75,7 @@ required: > - iommus > - assigned-clocks > - assigned-clock-parents > + - power-domains > > allOf: > - if: > @@ -132,6 +136,7 @@ examples: > #include <dt-bindings/clock/mt8173-clk.h> > #include <dt-bindings/memory/mt8173-larb-port.h> > #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/power/mt8173-power.h> > > vcodec_enc_avc: vcodec@18002000 { > compatible = "mediatek,mt8173-vcodec-enc"; > @@ -153,6 +158,7 @@ examples: > clock-names = "venc_sel"; > assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; > assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; > + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; > }; > > vcodec_enc_vp8: vcodec@19002000 { > @@ -173,4 +179,5 @@ examples: > clock-names = "venc_lt_sel"; > assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; > assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>; > + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC_LT>; > }; > -- > 2.18.0 > >
diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml index deb5b657a2d5..3c069c965992 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml @@ -41,6 +41,9 @@ properties: assigned-clock-parents: true + power-domains: + maxItems: 1 + iommus: minItems: 1 maxItems: 32 @@ -72,6 +75,7 @@ required: - iommus - assigned-clocks - assigned-clock-parents + - power-domains allOf: - if: @@ -132,6 +136,7 @@ examples: #include <dt-bindings/clock/mt8173-clk.h> #include <dt-bindings/memory/mt8173-larb-port.h> #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/power/mt8173-power.h> vcodec_enc_avc: vcodec@18002000 { compatible = "mediatek,mt8173-vcodec-enc"; @@ -153,6 +158,7 @@ examples: clock-names = "venc_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC>; }; vcodec_enc_vp8: vcodec@19002000 { @@ -173,4 +179,5 @@ examples: clock-names = "venc_lt_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>; + power-domains = <&scpsys MT8173_POWER_DOMAIN_VENC_LT>; };
Adds encoder power domain property Signed-off-by: Irui Wang <irui.wang@mediatek.com> --- .../devicetree/bindings/media/mediatek,vcodec-encoder.yaml | 7 +++++++ 1 file changed, 7 insertions(+)