Message ID | 20220414002349.24332-1-samuel@sholland.org |
---|---|
State | Accepted |
Commit | a85a8ca9d2fb153944aea1d1b664e64d4ed0b88f |
Headers | show |
Series | [v2,1/3] dt-bindings: input: sun4i-lradc-keys: Add R329 and D1 compatibles | expand |
Dne četrtek, 14. april 2022 ob 02:23:47 CEST je Samuel Holland napisal(a): > Until the R329, the LRADC hardware was always active. Now it requires > enabling a clock gate and deasserting a reset line. Add support for this > variant of the hardware. > > Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > --- > > Changes in v2: > - Guard the code with a flag instead of using "_optional" variants. > > drivers/input/keyboard/sun4i-lradc-keys.c | 33 +++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/drivers/input/keyboard/sun4i-lradc-keys.c > b/drivers/input/keyboard/sun4i-lradc-keys.c index > 4a796bed48ac..5630334a6c09 100644 > --- a/drivers/input/keyboard/sun4i-lradc-keys.c > +++ b/drivers/input/keyboard/sun4i-lradc-keys.c > @@ -14,6 +14,7 @@ > * there are no boards known to use channel 1. > */ > > +#include <linux/clk.h> > #include <linux/err.h> > #include <linux/init.h> > #include <linux/input.h> > @@ -23,6 +24,7 @@ > #include <linux/of_platform.h> > #include <linux/platform_device.h> > #include <linux/regulator/consumer.h> > +#include <linux/reset.h> > #include <linux/slab.h> > > #define LRADC_CTRL 0x00 > @@ -58,10 +60,12 @@ > /* struct lradc_variant - Describe sun4i-a10-lradc-keys hardware variant > * @divisor_numerator: The numerator of lradc Vref internally divisor > * @divisor_denominator: The denominator of lradc Vref internally divisor > + * @has_clock_reset: If the binding requires a clock and reset > */ > struct lradc_variant { > u8 divisor_numerator; > u8 divisor_denominator; > + bool has_clock_reset; > }; > > static const struct lradc_variant lradc_variant_a10 = { > @@ -83,6 +87,8 @@ struct sun4i_lradc_data { > struct device *dev; > struct input_dev *input; > void __iomem *base; > + struct clk *clk; > + struct reset_control *reset; > struct regulator *vref_supply; > struct sun4i_lradc_keymap *chan0_map; > const struct lradc_variant *variant; > @@ -140,6 +146,14 @@ static int sun4i_lradc_open(struct input_dev *dev) > if (error) > return error; > > + error = reset_control_deassert(lradc->reset); > + if (error) > + goto err_disable_reg; > + > + error = clk_prepare_enable(lradc->clk); > + if (error) > + goto err_assert_reset; > + > lradc->vref = regulator_get_voltage(lradc->vref_supply) * > lradc->variant->divisor_numerator / > lradc->variant->divisor_denominator; > @@ -153,6 +167,13 @@ static int sun4i_lradc_open(struct input_dev *dev) > writel(CHAN0_KEYUP_IRQ | CHAN0_KEYDOWN_IRQ, lradc->base + LRADC_INTC); > > return 0; > + > +err_assert_reset: > + reset_control_assert(lradc->reset); > +err_disable_reg: > + regulator_disable(lradc->vref_supply); > + > + return error; > } > > static void sun4i_lradc_close(struct input_dev *dev) > @@ -164,6 +185,8 @@ static void sun4i_lradc_close(struct input_dev *dev) > SAMPLE_RATE(2), lradc->base + LRADC_CTRL); > writel(0, lradc->base + LRADC_INTC); > > + clk_disable_unprepare(lradc->clk); > + reset_control_assert(lradc->reset); > regulator_disable(lradc->vref_supply); > } > > @@ -243,6 +266,16 @@ static int sun4i_lradc_probe(struct platform_device > *pdev) return -EINVAL; > } > > + if (lradc->variant->has_clock_reset) { > + lradc->clk = devm_clk_get(dev, NULL); > + if (IS_ERR(lradc->clk)) > + return PTR_ERR(lradc->clk); > + > + lradc->reset = devm_reset_control_get_exclusive(dev, NULL); > + if (IS_ERR(lradc->reset)) > + return PTR_ERR(lradc->reset); > + } > + > lradc->vref_supply = devm_regulator_get(dev, "vref"); > if (IS_ERR(lradc->vref_supply)) > return PTR_ERR(lradc->vref_supply);
On Wed, Apr 13, 2022 at 07:23:46PM -0500, Samuel Holland wrote: > The R329 and D1 SoCs each contain an LRADC with a programming interface > compatible to earlier LRADCs. However, the LRADC now has its own clock > gate and reset line, instead of being always active. > > To support this, add clock/reset properties to the binding, and require > them for the variant in the new SoCs. > > Acked-by: Maxime Ripard <maxime@cerno.tech> > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Samuel Holland <samuel@sholland.org> Applied, thank you.
diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml index d74f2002409e..3399fc288afb 100644 --- a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml +++ b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml @@ -18,10 +18,20 @@ properties: - items: - const: allwinner,sun50i-a64-lradc - const: allwinner,sun8i-a83t-r-lradc + - const: allwinner,sun50i-r329-lradc + - items: + - const: allwinner,sun20i-d1-lradc + - const: allwinner,sun50i-r329-lradc reg: maxItems: 1 + clocks: + maxItems: 1 + + resets: + maxItems: 1 + interrupts: maxItems: 1 @@ -68,6 +78,18 @@ required: - interrupts - vref-supply +if: + properties: + compatible: + contains: + enum: + - allwinner,sun50i-r329-lradc + +then: + required: + - clocks + - resets + additionalProperties: false examples: