diff mbox series

dt-bindings: firmware: convert Qualcomm SCM binding to the yaml

Message ID 20211218194038.26913-1-david@ixit.cz
State Superseded
Headers show
Series dt-bindings: firmware: convert Qualcomm SCM binding to the yaml | expand

Commit Message

David Heidelberg Dec. 18, 2021, 7:40 p.m. UTC
Convert Qualcomm SCM firmware binding to the yaml format.

Signed-off-by: David Heidelberg <david@ixit.cz>
---
This patch comes with followup question -> since not all definitions
follow `"qcom,scm-*chipset*", "qcom,scm"`, should I change them or adjust this
binding to cover all cases?

 .../devicetree/bindings/firmware/qcom,scm.txt |  54 ---------
 .../bindings/firmware/qcom,scm.yaml           | 112 ++++++++++++++++++
 2 files changed, 112 insertions(+), 54 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
 create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml

Comments

Krzysztof Kozlowski April 10, 2022, 8:50 a.m. UTC | #1
On 31/01/2022 22:26, Bjorn Andersson wrote:
> On Sat 18 Dec 13:40 CST 2021, David Heidelberg wrote:
> 
>> Convert Qualcomm SCM firmware binding to the yaml format.
>>
>> Signed-off-by: David Heidelberg <david@ixit.cz>
>> ---
>> This patch comes with followup question -> since not all definitions
>> follow `"qcom,scm-*chipset*", "qcom,scm"`, should I change them or adjust this
>> binding to cover all cases?
>>
> 
> I don't remember why some platforms has the generic "fallback" and
> others doesn't. I don't have any objections to defining the binding as
> you've done.

Looking at the driver it seems that there some differences between
certain versions and generic qcom,scm. For example they require bus
clock which could mean they won't work without it on a "qcom,scm"
compatible. That could mean that original "qcom,scm" also required that
bus clock but it was for example always enabled. Or that clock was never
needed on "qcom,scm".

I think this should be converted without generic fallback, IOW, the
original bindings are not accurate and driver+DTS are better hints how
it should work.


Best regards,
Krzysztof
Krzysztof Kozlowski April 10, 2022, 8:58 a.m. UTC | #2
On 18/12/2021 20:40, David Heidelberg wrote:
> Convert Qualcomm SCM firmware binding to the yaml format.
> 
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
> This patch comes with followup question -> since not all definitions
> follow `"qcom,scm-*chipset*", "qcom,scm"`, should I change them or adjust this
> binding to cover all cases?
> 

Thank you for your patch. I hope you will continue to work on this and
send a v2. :)

There is something to discuss/improve.

>  .../devicetree/bindings/firmware/qcom,scm.txt |  54 ---------
>  .../bindings/firmware/qcom,scm.yaml           | 112 ++++++++++++++++++
>  2 files changed, 112 insertions(+), 54 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
>  create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> 

(...)

> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - qcom,scm-apq8064
> +          - qcom,scm-apq8084
> +          - qcom,scm-ipq4019
> +          - qcom,scm-ipq806x
> +          - qcom,scm-ipq8074
> +          - qcom,scm-mdm9607
> +          - qcom,scm-msm8226
> +          - qcom,scm-msm8660
> +          - qcom,scm-msm8916
> +          - qcom,scm-msm8953
> +          - qcom,scm-msm8960
> +          - qcom,scm-msm8974
> +          - qcom,scm-msm8994
> +          - qcom,scm-msm8996
> +          - qcom,scm-msm8998
> +          - qcom,scm-sc7180
> +          - qcom,scm-sc7280
> +          - qcom,scm-sdm845
> +          - qcom,scm-sdx55
> +          - qcom,scm-sm8150
> +          - qcom,scm-sm8250
> +          - qcom,scm-sm8350
> +      - const: qcom,scm
> +
> +  clocks:
> +    minItems: 1
> +    maxItems: 3
> +
> +  clock-names: true
> +
> +  qcom,dload-mode:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: >

No need for >

> +      TCSR hardware block and offset of the download mode control register

Could you define the items (and I think it has to be phandle-array in
such case) like here for samsung,sysreg:
https://elixir.bootlin.com/linux/v5.18-rc1/source/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml#L42

This helps to validate the actual phandle.

The DTSes have also few other properties (like reset-cells). They can be
added in this commit, just please mention it in the commit msg.

> +
> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,scm-apq8064
> +              - qcom,scm-msm8660
> +              - qcom,scm-msm8960
> +    then:
> +      properties:
> +        clock-names:
> +          items:
> +            - const: core
> +
> +      required:
> +        - clocks
> +        - clock-names
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - qcom,scm-apq8084

Based on the driver you also need (this can be in separate commit or
just mention in commit msg):
qcom,scm-mdm9607


Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
deleted file mode 100644
index d7e3cda8924e..000000000000
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
+++ /dev/null
@@ -1,54 +0,0 @@ 
-QCOM Secure Channel Manager (SCM)
-
-Qualcomm processors include an interface to communicate to the secure firmware.
-This interface allows for clients to request different types of actions.  These
-can include CPU power up/down, HDCP requests, loading of firmware, and other
-assorted actions.
-
-Required properties:
-- compatible: must contain one of the following:
- * "qcom,scm-apq8064"
- * "qcom,scm-apq8084"
- * "qcom,scm-ipq4019"
- * "qcom,scm-ipq806x"
- * "qcom,scm-ipq8074"
- * "qcom,scm-mdm9607"
- * "qcom,scm-msm8226"
- * "qcom,scm-msm8660"
- * "qcom,scm-msm8916"
- * "qcom,scm-msm8953"
- * "qcom,scm-msm8960"
- * "qcom,scm-msm8974"
- * "qcom,scm-msm8994"
- * "qcom,scm-msm8996"
- * "qcom,scm-msm8998"
- * "qcom,scm-sc7180"
- * "qcom,scm-sc7280"
- * "qcom,scm-sdm845"
- * "qcom,scm-sdx55"
- * "qcom,scm-sm8150"
- * "qcom,scm-sm8250"
- * "qcom,scm-sm8350"
- and:
- * "qcom,scm"
-- clocks: Specifies clocks needed by the SCM interface, if any:
- * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
-   "qcom,scm-msm8960"
- * core, iface and bus clocks required for "qcom,scm-apq8084",
-   "qcom,scm-msm8916", "qcom,scm-msm8953" and "qcom,scm-msm8974"
-- clock-names: Must contain "core" for the core clock, "iface" for the interface
-  clock and "bus" for the bus clock per the requirements of the compatible.
-- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
-		   download mode control register (optional)
-
-Example for MSM8916:
-
-	firmware {
-		scm {
-			compatible = "qcom,msm8916", "qcom,scm";
-			clocks = <&gcc GCC_CRYPTO_CLK> ,
-				 <&gcc GCC_CRYPTO_AXI_CLK>,
-				 <&gcc GCC_CRYPTO_AHB_CLK>;
-			clock-names = "core", "bus", "iface";
-		};
-	};
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
new file mode 100644
index 000000000000..3a7261734fad
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -0,0 +1,112 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/firmware/qcom,scm.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: QCOM Secure Channel Manager (SCM)
+
+description: |
+  Qualcomm processors include an interface to communicate to the secure firmware.
+  This interface allows for clients to request different types of actions.  These
+  can include CPU power up/down, HDCP requests, loading of firmware, and other
+  assorted actions.
+
+maintainers:
+  - Andy Gross <andy.gross@linaro.org>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,scm-apq8064
+          - qcom,scm-apq8084
+          - qcom,scm-ipq4019
+          - qcom,scm-ipq806x
+          - qcom,scm-ipq8074
+          - qcom,scm-mdm9607
+          - qcom,scm-msm8226
+          - qcom,scm-msm8660
+          - qcom,scm-msm8916
+          - qcom,scm-msm8953
+          - qcom,scm-msm8960
+          - qcom,scm-msm8974
+          - qcom,scm-msm8994
+          - qcom,scm-msm8996
+          - qcom,scm-msm8998
+          - qcom,scm-sc7180
+          - qcom,scm-sc7280
+          - qcom,scm-sdm845
+          - qcom,scm-sdx55
+          - qcom,scm-sm8150
+          - qcom,scm-sm8250
+          - qcom,scm-sm8350
+      - const: qcom,scm
+
+  clocks:
+    minItems: 1
+    maxItems: 3
+
+  clock-names: true
+
+  qcom,dload-mode:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: >
+      TCSR hardware block and offset of the download mode control register
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,scm-apq8064
+              - qcom,scm-msm8660
+              - qcom,scm-msm8960
+    then:
+      properties:
+        clock-names:
+          items:
+            - const: core
+
+      required:
+        - clocks
+        - clock-names
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - qcom,scm-apq8084
+              - qcom,scm-msm8916
+              - qcom,scm-msm8953
+              - qcom,scm-msm8974
+    then:
+      properties:
+        clock-names:
+          items:
+            - const: core
+            - const: iface
+            - const: bus
+
+      required:
+        - clocks
+        - clock-names
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    firmware {
+        scm {
+            compatible = "qcom,msm8916", "qcom,scm";
+            clocks = <&gcc 104>,
+                     <&gcc 77>,
+                     <&gcc 86>;
+            clock-names = "core", "bus", "iface";
+        };
+    };