| Message ID | 20220406082330.2681591-3-peng.fan@oss.nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | imx: support noc settings with power domain | expand |
Hi Peng, Thank you for the patch. On Wed, Apr 06, 2022 at 04:23:27PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > Add i.MX8MP main noc node > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index e9e55fdd7652..be902f8155e8 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -1015,6 +1015,13 @@ gpu2d: gpu@38008000 { > power-domains = <&pgc_gpu2d>; > }; > > + noc: interconnect@32700000 { > + compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc", "syscon"; > + reg = <0x32700000 0x100000>; I can't comment on this, as the memory is documented as reserved in the reference manual, but I have no reason not to trust you :-) > + clocks = <&clk IMX8MP_CLK_NOC>; There's also a NOC_WRAPPER clock documented in the reference manual, and also a NOC_IO clock. Are those related, do we need to care about them ? > + #interconnect-cells = <1>; > + }; > + > aips4 { > compatible = "fsl,aips-bus", "simple-bus"; > reg = <0x32c00000 0x400000>;
> Subject: Re: [PATCH 2/5] arm64: dts: imx8mp: add noc node > > Hi Peng, > > Thank you for the patch. > > On Wed, Apr 06, 2022 at 04:23:27PM +0800, Peng Fan (OSS) wrote: > > From: Peng Fan <peng.fan@nxp.com> > > > > Add i.MX8MP main noc node > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > > --- > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > index e9e55fdd7652..be902f8155e8 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > > @@ -1015,6 +1015,13 @@ gpu2d: gpu@38008000 { > > power-domains = <&pgc_gpu2d>; > > }; > > > > + noc: interconnect@32700000 { > > + compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc", "syscon"; > > + reg = <0x32700000 0x100000>; > > I can't comment on this, as the memory is documented as reserved in the > reference manual, but I have no reason not to trust you :-) thanks. Sadly, I have asked, but the NoC doc will not be public. > > > + clocks = <&clk IMX8MP_CLK_NOC>; > > There's also a NOC_WRAPPER clock documented in the reference manual, > and also a NOC_IO clock. Are those related, do we need to care about them ? Thanks for pointing this out, yes, we need NOC_IO clk. But since NOC and NOC_IO clk are both critical clk, I not met issue :) Thanks, Peng. > > > + #interconnect-cells = <1>; > > + }; > > + > > aips4 { > > compatible = "fsl,aips-bus", "simple-bus"; > > reg = <0x32c00000 0x400000>; > > -- > Regards, > > Laurent Pinchart
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index e9e55fdd7652..be902f8155e8 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1015,6 +1015,13 @@ gpu2d: gpu@38008000 { power-domains = <&pgc_gpu2d>; }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc", "syscon"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MP_CLK_NOC>; + #interconnect-cells = <1>; + }; + aips4 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x32c00000 0x400000>;