diff mbox series

[v3,1/2] dt-bindings: net: xilinx_axienet: add pcs-handle attribute

Message ID 20220318070039.108948-1-andy.chiu@sifive.com
State New
Headers show
Series [v3,1/2] dt-bindings: net: xilinx_axienet: add pcs-handle attribute | expand

Commit Message

Andy Chiu March 18, 2022, 7 a.m. UTC
Document the new pcs-handle attribute to support connecting to an
external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA
PHY.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
---
 Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Robert Hancock March 18, 2022, 4:51 p.m. UTC | #1
On Fri, 2022-03-18 at 15:00 +0800, Andy Chiu wrote:
> Document the new pcs-handle attribute to support connecting to an
> external PHY in SGMII or 1000Base-X modes through the internal PCS/PMA
> PHY.
> 
> Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
> Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
> ---
>  Documentation/devicetree/bindings/net/xilinx_axienet.txt | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> index b8e4894bc634..a2fa3bef0901 100644
> --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
> @@ -68,6 +68,11 @@ Optional properties:
>  		  required through the core's MDIO interface (i.e. always,
>  		  unless the PHY is accessed through a different bus).
>  
> + - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or
> 1000Base-X
> +		  modes, where "pcs-handle" should be preferably used to point
> +		  to the PCS/PMA PHY, and "phy-handle" should point to an
> +		  external PHY if exits.

Spelling: exits -> exists

> +
>  Example:
>  	axi_ethernet_eth: ethernet@40c00000 {
>  		compatible = "xlnx,axi-ethernet-1.00.a";
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..a2fa3bef0901 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -68,6 +68,11 @@  Optional properties:
 		  required through the core's MDIO interface (i.e. always,
 		  unless the PHY is accessed through a different bus).
 
+ - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+		  modes, where "pcs-handle" should be preferably used to point
+		  to the PCS/PMA PHY, and "phy-handle" should point to an
+		  external PHY if exits.
+
 Example:
 	axi_ethernet_eth: ethernet@40c00000 {
 		compatible = "xlnx,axi-ethernet-1.00.a";