| Message ID | 1643887981-31011-3-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add soundcard support for sc7280 based platforms. | expand |
Quoting Srinivasa Rao Mandadapu (2022-02-03 03:33:00) > Add lpass cpu node for audio on sc7280 based platforms. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 28 +++++++++++++++ > arch/arm64/boot/dts/qcom/sc7280.dtsi | 59 ++++++++++++++++++++++++++++++++ > 2 files changed, 87 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > index 2806888..a76b2d1 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi > @@ -691,3 +691,31 @@ > &vamacro { > vdd-micb-supply = <&vreg_bob>; > }; > + > +&lpass_cpu { > + status = "okay"; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&sec_mi2s_active>; Is it a reset gpio? If so, make it a reset-gpios property. I couldn't find the definition. > + > + mi2s-secondary@1 { > + reg = <MI2S_SECONDARY>; > + qcom,playback-sd-lines = <0>; > + }; > + > + hdmi-primary@5 { > + reg = <LPASS_DP_RX>; > + }; > + > + wcd-rx@6 { > + reg = <LPASS_CDC_DMA_RX0>; > + }; > + > + wcd-tx@19 { > + reg = <LPASS_CDC_DMA_TX3>; > + }; > + > + va-tx@25 { > + reg = <LPASS_CDC_DMA_VA_TX0>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 946eb01..c2da5ce 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -17,6 +17,7 @@ > #include <dt-bindings/reset/qcom,sdm845-aoss.h> > #include <dt-bindings/reset/qcom,sdm845-pdc.h> > #include <dt-bindings/soc/qcom,rpmh-rsc.h> > +#include <dt-bindings/sound/qcom,lpass.h> > #include <dt-bindings/thermal/thermal.h> > > / { > @@ -1847,6 +1848,64 @@ > #size-cells = <0>; > }; > > + lpass_cpu: audio-subsystem@3260000 { > + compatible = "qcom,sc7280-lpass-cpu"; > + reg = <0 0x3260000 0 0xC000>, > + <0 0x3280000 0 0x29000>, > + <0 0x3340000 0 0x29000>, > + <0 0x336C000 0 0x3000>, > + <0 0x3987000 0 0x68000>, > + <0 0x3B00000 0 0x29000>; Lowercase hex. Pad out reg to 8 digits. > + reg-names = "lpass-rxtx-cdc-dma-lpm", > + "lpass-rxtx-lpaif", > + "lpass-va-lpaif", > + "lpass-va-cdc-dma-lpm", > + "lpass-hdmiif", > + "lpass-lpaif"; That 'lpass' prefix looks very redundant. > + > + iommus = <&apps_smmu 0x1820 0>, > + <&apps_smmu 0x1821 0>, > + <&apps_smmu 0x1832 0>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 2806888..a76b2d1 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -691,3 +691,31 @@ &vamacro { vdd-micb-supply = <&vreg_bob>; }; + +&lpass_cpu { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&sec_mi2s_active>; + + mi2s-secondary@1 { + reg = <MI2S_SECONDARY>; + qcom,playback-sd-lines = <0>; + }; + + hdmi-primary@5 { + reg = <LPASS_DP_RX>; + }; + + wcd-rx@6 { + reg = <LPASS_CDC_DMA_RX0>; + }; + + wcd-tx@19 { + reg = <LPASS_CDC_DMA_TX3>; + }; + + va-tx@25 { + reg = <LPASS_CDC_DMA_VA_TX0>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 946eb01..c2da5ce 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -17,6 +17,7 @@ #include <dt-bindings/reset/qcom,sdm845-aoss.h> #include <dt-bindings/reset/qcom,sdm845-pdc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> +#include <dt-bindings/sound/qcom,lpass.h> #include <dt-bindings/thermal/thermal.h> / { @@ -1847,6 +1848,64 @@ #size-cells = <0>; }; + lpass_cpu: audio-subsystem@3260000 { + compatible = "qcom,sc7280-lpass-cpu"; + reg = <0 0x3260000 0 0xC000>, + <0 0x3280000 0 0x29000>, + <0 0x3340000 0 0x29000>, + <0 0x336C000 0 0x3000>, + <0 0x3987000 0 0x68000>, + <0 0x3B00000 0 0x29000>; + reg-names = "lpass-rxtx-cdc-dma-lpm", + "lpass-rxtx-lpaif", + "lpass-va-lpaif", + "lpass-va-cdc-dma-lpm", + "lpass-hdmiif", + "lpass-lpaif"; + + iommus = <&apps_smmu 0x1820 0>, + <&apps_smmu 0x1821 0>, + <&apps_smmu 0x1832 0>; + status = "disabled"; + + power-domains = <&rpmhpd SC7280_LCX>; + power-domain-names = "lcx"; + required-opps = <&rpmhpd_opp_nom>; + + clocks = <&lpass_aon LPASS_AON_CC_AUDIO_HM_H_CLK>, + <&lpasscore LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM0_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM1_CLK>, + <&lpass_audiocc LPASS_AUDIO_CC_CODEC_MEM2_CLK>, + <&lpasscore LPASS_CORE_CC_EXT_IF0_IBIT_CLK>, + <&lpasscore LPASS_CORE_CC_EXT_IF1_IBIT_CLK>, + <&lpass_aon LPASS_AON_CC_VA_MEM0_CLK>; + clock-names = "aon_cc_audio_hm_h", + "core_cc_sysnoc_mport_core", + "audio_cc_codec_mem", + "audio_cc_codec_mem0", + "audio_cc_codec_mem1", + "audio_cc_codec_mem2", + "core_cc_ext_if0_ibit", + "core_cc_ext_if1_ibit", + "aon_cc_va_mem0"; + + #sound-dai-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; + + interrupt-names = "lpass-irq-lpaif", + "lpass-irq-vaif", + "lpass-irq-rxtxif", + "lpass-irq-hdmi"; + }; + vamacro: codec@3370000 { compatible = "qcom,sc7280-lpass-va-macro"; pinctrl-0 = <&dmic01_active>;