| Message ID | 1645125264-11033-1-git-send-email-harsha.harsha@xilinx.com |
|---|---|
| Headers | show |
| Series | crypto: Add Xilinx ZynqMP SHA3 driver support | expand |
> -----Original Message----- > From: Harsha Harsha > Sent: Monday, February 21, 2022 5:47 PM > To: Corentin Labbe <clabbe.montjoie@gmail.com> > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; Michal Simek <michals@xilinx.com>; Sarat Chand Savitala <saratcha@xilinx.com>; Harsh Jain > <harshj@xilinx.com>; git <git@xilinx.com> > Subject: RE: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality > > > > > -----Original Message----- > > From: Corentin Labbe <clabbe.montjoie@gmail.com> > > Sent: Friday, February 18, 2022 3:13 PM > > To: Harsha Harsha <harshah@xilinx.com> > > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm- > > kernel@lists.infradead.org; Michal Simek <michals@xilinx.com>; Sarat Chand Savitala <saratcha@xilinx.com>; Harsh Jain > > <harshj@xilinx.com>; git <git@xilinx.com> > > Subject: Re: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality > > > > Le Fri, Feb 18, 2022 at 12:44:22AM +0530, Harsha a écrit : > > > This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute > > > SHA3 hash of given data. > > > > > > Signed-off-by: Harsha <harsha.harsha@xilinx.com> > > > Acked-by: Michal Simek <michal.simek@xilinx.com> > > > --- > > > > Hello > > > > Your signed-off should contain your real name. > > My complete name is Harsha which I have mentioned in the signed-off section. I shall update SOB as Signed-off-by: Harsha Harsha <harsha.harsha@xilinx.com> in the next version of patch. > > > Furthermore why did you drop copyright from previous poster ? > > See https://patchwork.kernel.org/project/linux-crypto/cover/1556793282-17346-1-git-send-email-kalyani.akula@xilinx.com/ for > > reference. > > I did not understand the comment. Do you want me to add Kalyani's name also in the Signed of section? I will retain Kalyani as the author in next version of patch. > > > > > Furthermore, the previous poster didnt answered my questions about parallel processing and tests. > > Since SHA3 HW engine in ZynqMPSoC does not support parallel processing of 2 hash requests, so we have changed our approach. > Now to support parallel processing of 2 hash requests, software fallback is being used for init, update, final, export and import in the > ZynqMP SHA driver. > For digest, the calculation of SHA3 hash is done by the hardened SHA3 accelerator in Xilinx ZynqMP SoC. > > Following tests have been done for the driver: > - Enabled kernel self tests and extra run-time crypto self tests > - Tested SHA hash computation for different sizes of data using userspace application > - Tested SHA hash computation using multiple updates of data using userspace application > - Tested parallel hash computation > - Tested using the tcrypt module > > > > > Regards > > Regards, > Harsha
This patch set does the following: - Updates the Makefile for xilinx subdirectory - Adds communication layer support for sha_hash in zynqmp.c - Adds Xilinx ZynqMP driver for SHA3 Algorithm - Updates the list of MAINTAINERS V2 changes: - Removed dependency on COMPILE_TEST in 3/4 - Rebased this patchset on latest Cryptodev-2.6 tree which fixed below kernel robot warning In file included from ./arch/s390/include/generated/asm/cacheflush.h:1, from drivers/crypto/xilinx/zynqmp-sha.c:6: include/asm-generic/cacheflush.h:53:46: warning: 'struct folio' declared inside parameter list will not be visible outside of this definition or declaration 53 | static inline void flush_dcache_folio(struct folio *folio) { } | - Included linux/cacheflush.h instead of asm/cacheflush.h in 3/4 V1 changes: - Converted RFC patch to PATCH - Updated zynqmp-sha driver so that it can be self discovered - Removed patch 3/6 and 4/6 as they added support for device tree - Substituted hw with hardware in drivers/crypto/Kconfig Harsha (4): drivers: crypto: Updated Makefile for xilinx subdirectory firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality crypto: xilinx: Add Xilinx SHA3 driver MAINTAINERS: Add maintainer for Xilinx ZynqMP SHA3 driver MAINTAINERS | 5 + drivers/crypto/Kconfig | 10 ++ drivers/crypto/Makefile | 2 +- drivers/crypto/xilinx/Makefile | 1 + drivers/crypto/xilinx/zynqmp-sha.c | 285 +++++++++++++++++++++++++++++++++++ drivers/firmware/xilinx/zynqmp.c | 26 ++++ include/linux/firmware/xlnx-zynqmp.h | 8 + 7 files changed, 336 insertions(+), 1 deletion(-) create mode 100644 drivers/crypto/xilinx/zynqmp-sha.c