| Message ID | 20220210062122.23974-1-guodong.liu@mediatek.com |
|---|---|
| Headers | show |
| Series | pinctrl: mediatek: Support pinctrl driver on mt8186 | expand |
On Thu, Feb 10, 2022 at 7:21 AM Guodong Liu <guodong.liu@mediatek.com> wrote: > > 1. This patch adds pinctrl file for mt8186. > 2. This patch adds mt8186 compatible node in binding document. > > Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> I see complaints from Rob's robot so please address these or explain why they appear. Yours, Linus Walleij
On Thu, Feb 10, 2022 at 02:21:20PM +0800, Guodong Liu wrote: > 1. This patch adds pinctrl file for mt8186. > 2. This patch adds mt8186 compatible node in binding document. > > Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> > --- > .../bindings/pinctrl/pinctrl-mt8186.yaml | 313 +++++ > include/dt-bindings/pinctrl/mt8186-pinfunc.h | 1174 +++++++++++++++++ > 2 files changed, 1487 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml > create mode 100644 include/dt-bindings/pinctrl/mt8186-pinfunc.h > > diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml > new file mode 100644 > index 000000000000..54c9508af922 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml > @@ -0,0 +1,313 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek MT8186 Pin Controller > + > +maintainers: > + - Sean Wang <sean.wang@mediatek.com> > + > +description: | > + The Mediatek's Pin controller is used to control SoC pins. > + > +properties: > + compatible: > + const: mediatek,mt8186-pinctrl > + > + gpio-controller: true > + > + '#gpio-cells': > + description: | > + Number of cells in GPIO specifier. Since the generic GPIO binding is used, > + the amount of cells must be specified as 2. See the below > + mentioned gpio binding representation for description of particular cells. > + const: 2 > + > + gpio-ranges: > + description: gpio valid number range. Don't need generic descriptions for common properties > + maxItems: 1 > + > + reg: > + description: | > + Physical address base for gpio base registers. There are 8 different GPIO > + physical address base in mt8186. > + maxItems: 8 > + > + reg-names: > + description: | > + Gpio base register names. > + items: > + - const: "iocfg0" > + - const: "iocfg_bm" > + - const: "iocfg_bl" > + - const: "iocfg_br" > + - const: "iocfg_lm" > + - const: "iocfg_rb" > + - const: "iocfg_tl" > + - const: "eint" Don't need quotes > + maxItems: 8 > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 2 > + > + interrupts: > + description: The interrupt outputs to sysirq. Drop. > + maxItems: 1 > + > + mediatek,rsel-resistance-in-si-unit: > + type: boolean > + description: | > + Identifying i2c pins pull up/down type which is RSEL. It can support > + RSEL define or si unit value(ohm) to set different resistance. > + > +# PIN CONFIGURATION NODES > +patternProperties: > + '-pins$': > + type: object > + additionalProperties: false > + patternProperties: > + '^pins': > + type: object > + additionalProperties: false > + description: | > + A pinctrl node should contain at least one subnodes representing the > + pinctrl groups available on the machine. Each subnode will list the > + pins it needs, and how they should be configured, with regard to muxer > + configuration, pullups, drive strength, input enable/disable and > + input schmitt. > + An example of using macro: > + pincontroller { > + /* GPIO0 set as multifunction GPIO0 */ > + gpio-pins { > + pins { > + pinmux = <PINMUX_GPIO0__FUNC_GPIO0>; > + } > + }; > + /* GPIO128 set as multifunction SDA0 */ > + i2c0-pins { > + pins { > + pinmux = <PINMUX_GPIO128__FUNC_SDA0>; > + } > + }; > + }; > + $ref: "pinmux-node.yaml" > + > + properties: > + pinmux: > + description: | > + Integer array, represents gpio pin number and mux setting. > + Supported pin number and mux varies for different SoCs, and are > + defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h > + directly. > + > + drive-strength: > + enum: [2, 4, 6, 8, 10, 12, 14, 16] > + > + mediatek,drive-strength-adv: > + description: | > + Describe the specific driving setup property. > + For I2C pins, the existing generic driving setup can only support > + 2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they > + can support 0.125/0.25/0.5/1mA adjustment. If we enable specific > + driving setup, the existing generic setup will be disabled. > + The specific driving setup is controlled by E1E0EN. > + When E1=0/E0=0, the strength is 0.125mA. > + When E1=0/E0=1, the strength is 0.25mA. > + When E1=1/E0=0, the strength is 0.5mA. > + When E1=1/E0=1, the strength is 1mA. > + EN is used to enable or disable the specific driving setup. > + Valid arguments are described as below: > + 0: (E1, E0, EN) = (0, 0, 0) > + 1: (E1, E0, EN) = (0, 0, 1) > + 2: (E1, E0, EN) = (0, 1, 0) > + 3: (E1, E0, EN) = (0, 1, 1) > + 4: (E1, E0, EN) = (1, 0, 0) > + 5: (E1, E0, EN) = (1, 0, 1) > + 6: (E1, E0, EN) = (1, 1, 0) > + 7: (E1, E0, EN) = (1, 1, 1) > + So the valid arguments are from 0 to 7. > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [0, 1, 2, 3, 4, 5, 6, 7] > + > + bias-pull-down: > + oneOf: > + - enum: [100, 101, 102, 103] > + - description: mt8186 pull down PUPD/R0/R1 type define value. > + - enum: [200, 201, 202, 203, 204, 205, 206, 207] > + - description: mt8186 pull down RSEL type define value. > + - enum: [75000, 5000] > + - description: mt8186 pull down RSEL type si unit value(ohm). This should fail validation. All the description entries are True, so oneOf will be False. Drop the '-' on description so the enum and description are 1 entry. > + > + description: | > + For pull down type is normal, it don't need add RSEL & R1R0 define > + and resistance value. > + For pull down type is PUPD/R0/R1 type, it can add R1R0 define to > + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & > + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & > + "MTK_PUPD_SET_R1R0_11" define in mt8186. > + For pull down type is RSEL, it can add RSEL define & resistance > + value(ohm) to set different resistance by identifying property > + "mediatek,rsel-resistance-in-si-unit". > + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" > + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" > + & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" > + & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" > + define in mt8186. It can also support resistance value(ohm) > + "75000" & "5000" in mt8186. > + An example of using RSEL define: Perhaps move this to the example. > + pincontroller { > + i2c0_pin { > + pins { > + pinmux = <PINMUX_GPIO128__FUNC_SDA0>; > + bias-pull-down = <MTK_PULL_SET_RSEL_001>; > + } > + }; > + }; > + An example of using si unit resistance value(ohm): > + &pio { > + mediatek,rsel-resistance-in-si-unit; > + } > + pincontroller { > + i2c0_pin { > + pins { > + pinmux = <PINMUX_GPIO128__FUNC_SDA0>; > + bias-pull-down = <75000>; > + } > + }; > + }; > + > + bias-pull-up: > + oneOf: > + - enum: [100, 101, 102, 103] > + - description: mt8186 pull up PUPD/R0/R1 type define value. > + - enum: [200, 201, 202, 203, 204, 205, 206, 207] > + - description: mt8186 pull up RSEL type define value. > + - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000] > + - description: mt8186 pull up RSEL type si unit value(ohm). > + > + description: | > + For pull up type is normal, it don't need add RSEL & R1R0 define > + and resistance value. > + For pull up type is PUPD/R0/R1 type, it can add R1R0 define to > + set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & > + "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & > + "MTK_PUPD_SET_R1R0_11" define in mt8186. > + For pull up type is RSEL, it can add RSEL define & resistance > + value(ohm) to set different resistance by identifying property > + "mediatek,rsel-resistance-in-si-unit". > + It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" > + & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" > + & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" > + & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" > + define in mt8186. It can also support resistance value(ohm) > + "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & > + "75000" in mt8186. > + An example of using RSEL define: > + pincontroller { > + i2c0-pins { > + pins { > + pinmux = <PINMUX_GPIO128__FUNC_SDA0>; > + bias-pull-up = <MTK_PULL_SET_RSEL_001>; > + } > + }; > + }; > + An example of using si unit resistance value(ohm): > + &pio { > + mediatek,rsel-resistance-in-si-unit; > + } > + pincontroller { > + i2c0-pins { > + pins { > + pinmux = <PINMUX_GPIO128__FUNC_SDA0>; > + bias-pull-up = <1000>; > + } > + }; > + }; > + > + bias-disable: true > + > + output-high: true > + > + output-low: true > + > + input-enable: true > + > + input-disable: true > + > + input-schmitt-enable: true > + > + input-schmitt-disable: true > + > + required: > + - pinmux > + > +required: > + - compatible > + - reg > + - interrupts > + - interrupt-controller > + - '#interrupt-cells' > + - gpio-controller > + - '#gpio-cells' > + - gpio-ranges > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/pinctrl/mt8186-pinfunc.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + pio: pinctrl@10005000 { > + compatible = "mediatek,mt8186-pinctrl"; > + reg = <0x10005000 0x1000>, > + <0x10002000 0x0200>, > + <0x10002200 0x0200>, > + <0x10002400 0x0200>, > + <0x10002600 0x0200>, > + <0x10002A00 0x0200>, > + <0x10002c00 0x0200>, > + <0x1000b000 0x1000>; > + reg-names = "iocfg0", "iocfg_bm", "iocfg_bl", > + "iocfg_br", "iocfg_lm", "iocfg_rb", > + "iocfg_tl", "eint"; > + gpio-controller; > + #gpio-cells = <2>; > + gpio-ranges = <&pio 0 0 185>; > + interrupt-controller; > + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>; > + #interrupt-cells = <2>; > + > + pio-pins { > + pins { > + pinmux = <PINMUX_GPIO0__FUNC_GPIO0>; > + output-low; > + }; > + }; > + > + spi0-pins { > + pins-spi { > + pinmux = <PINMUX_GPIO0__FUNC_SPI0_CLK_B>, > + <PINMUX_GPIO1__FUNC_SPI0_CSB_B>, > + <PINMUX_GPIO2__FUNC_SPI0_MO_B>; > + bias-disable; > + }; > + pins-spi-mi { > + pinmux = <PINMUX_GPIO3__FUNC_SPI0_MI_B>; > + bias-pull-down; > + }; > + }; > + > + i2c0-pins { > + pins { > + pinmux = <PINMUX_GPIO127__FUNC_SCL0>, > + <PINMUX_GPIO128__FUNC_SDA0>; > + bias-disable; > + mediatek,drive-strength-adv = <7>; > + }; > + }; > + };
-----Original Message----- From: AngeloGioacchino Del Regno < angelogioacchino.delregno@collabora.com> To: Guodong Liu <guodong.liu@mediatek.com>, Linus Walleij < linus.walleij@linaro.org>, Rob Herring <robh+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Sean Wang <sean.wang@kernel.org> Cc: Sean Wang <sean.wang@mediatek.com>, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Project_Global_Chrome_Upstream_Group@mediatek.com Subject: Re: [PATCH v3 2/3] pinctrl: add pinctrl driver on mt8186 Date: Thu, 10 Feb 2022 09:57:03 +0100 Il 10/02/22 07:21, Guodong Liu ha scritto: > This commit includes pinctrl driver for mt8186. > > Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> > --- > drivers/pinctrl/mediatek/Kconfig | 7 + > drivers/pinctrl/mediatek/Makefile | 1 + > drivers/pinctrl/mediatek/pinctrl-mt8186.c | 1313 ++++++++++ > drivers/pinctrl/mediatek/pinctrl-mtk-mt8186.h | 2186 > +++++++++++++++++ > 4 files changed, 3507 insertions(+) > create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8186.c > create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8186.h > > diff --git a/drivers/pinctrl/mediatek/Kconfig > b/drivers/pinctrl/mediatek/Kconfig > index 66db4ac5d169..8dca1ef04965 100644 > --- a/drivers/pinctrl/mediatek/Kconfig > +++ b/drivers/pinctrl/mediatek/Kconfig > @@ -147,6 +147,13 @@ config PINCTRL_MT8183 > default ARM64 && ARCH_MEDIATEK > select PINCTRL_MTK_PARIS > > +config PINCTRL_MT8186 > + bool "Mediatek MT8186 pin control" > + depends on OF > + depends on ARM64 || COMPILE_TEST > + default ARM64 && ARCH_MEDIATEK > + select PINCTRL_MTK_PARIS > + > config PINCTRL_MT8192 > bool "Mediatek MT8192 pin control" > depends on OF > diff --git a/drivers/pinctrl/mediatek/Makefile > b/drivers/pinctrl/mediatek/Makefile > index 90f43bb9d9a7..31c3784c6089 100644 > --- a/drivers/pinctrl/mediatek/Makefile > +++ b/drivers/pinctrl/mediatek/Makefile > @@ -21,6 +21,7 @@ obj-$(CONFIG_PINCTRL_MT7986) += pinctrl- > mt7986.o > obj-$(CONFIG_PINCTRL_MT8167) += pinctrl-mt8167.o > obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o > obj-$(CONFIG_PINCTRL_MT8183) += pinctrl-mt8183.o > +obj-$(CONFIG_PINCTRL_MT8186) += pinctrl-mt8186.o > obj-$(CONFIG_PINCTRL_MT8192) += pinctrl-mt8192.o > obj-$(CONFIG_PINCTRL_MT8195) += pinctrl-mt8195.o > obj-$(CONFIG_PINCTRL_MT8365) += pinctrl-mt8365.o > diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8186.c > b/drivers/pinctrl/mediatek/pinctrl-mt8186.c > new file mode 100644 > index 000000000000..1e550b15b9d4 > --- /dev/null > +++ b/drivers/pinctrl/mediatek/pinctrl-mt8186.c > @@ -0,0 +1,1313 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2021 MediaTek Inc. > + * > + * Author: Guodong Liu <guodong.liu@mediatek.com> > + * > + */ > + > +#include "pinctrl-mtk-mt8186.h" > +#include "pinctrl-paris.h" > + > +/* MT8186 have multiple bases to program pin configuration listed as > the below: > + * iocfg[0]:0x10005000, iocfg[1]:0x10002000, iocfg[2]:0x10002200, > + * iocfg[3]:0x10002400, iocfg[4]:0x10002600, iocfg[5]:0x10002800, > + * iocfg[6]:0x10002C00. > + * _i_based could be used to indicate what base the pin should be > mapped into. > + */ > + > +#define PIN_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, > x_bits) \ > + PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, > x_bits, \ > + 32, 0) Please don't break this line: 84 columns is fine. Hi Angelo we will update it for next version. Thanks Guodong > + > +#define PINS_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, > s_bit, x_bits) \ > + PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, > x_bits, \ > + 32, 1) Same here. Hi Angelo we will update it for next version. Thanks Guodong And with that fixed, Reviewed-by: AngeloGioacchino Del Regno < angelogioacchino.delregno@collabora.com>
-----Original Message----- From: Rob Herring <robh@kernel.org> To: Guodong Liu <guodong.liu@mediatek.com> Cc: Linus Walleij <linus.walleij@linaro.org>, Sean Wang < sean.wang@mediatek.com>, linux-mediatek@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Project_Global_Chrome_Upstream_Group@mediatek.com, Matthias Brugger < matthias.bgg@gmail.com>, linux-gpio@vger.kernel.org, Sean Wang < sean.wang@kernel.org>, devicetree@vger.kernel.org Subject: Re: [PATCH v3 1/3] dt-bindings: pinctrl: mt8186: add pinctrl file and binding document Date: Thu, 10 Feb 2022 08:47:52 -0600 On Thu, 10 Feb 2022 14:21:20 +0800, Guodong Liu wrote: > 1. This patch adds pinctrl file for mt8186. > 2. This patch adds mt8186 compatible node in binding document. > > Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> > --- > .../bindings/pinctrl/pinctrl-mt8186.yaml | 313 +++++ > include/dt-bindings/pinctrl/mt8186-pinfunc.h | 1174 > +++++++++++++++++ > 2 files changed, 1487 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml > create mode 100644 include/dt-bindings/pinctrl/mt8186-pinfunc.h > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt- review/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml: properties:reg-names: {'description': 'Gpio base register names.\n', 'items': [{'const': 'iocfg0'}, {'const': 'iocfg_bm'}, {'const': 'iocfg_bl'}, {'const': 'iocfg_br'}, {'const': 'iocfg_lm'}, {'const': 'iocfg_rb'}, {'const': 'iocfg_tl'}, {'const': 'eint'}], 'maxItems': 8} should not be valid under {'required': ['maxItems']} hint: "maxItems" is not needed with an "items" list from schema $id: http://devicetree.org/meta-schemas/items.yaml# /builds/robherring/linux-dt- review/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml: ignoring, error in schema: properties: reg-names Documentation/devicetree/bindings/pinctrl/pinctrl- mt8186.example.dt.yaml:0:0: /example-0/pinctrl@10005000: failed to match any schema with compatible: ['mediatek,mt8186-pinctrl'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/1590838 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. Hi Rob Thank you fou your useful information, and we will update it for next version. Thanks Guodong
changes since v2: - update reg property - update reg-names property - sync rsel resistance selection property same as patch 3 - repair constraints is not indented correctly for bias-pull-{up,down} - add "type: boolean" to the list of valid values. This corresponds to having bias-pull-{up,down} without any arguments. - add dual file license for file "mt8186-pinfunc.h" - add patch 3 to change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit" changes since v1: - add default pinctrl config to consistent with other MTK pinctrl drivers Patch 1 add pinctrl file and binding document. Patch 2 add pinctrl chip driver on mt8186. Patch 3 canonical rsel resistance selection property. Guodong Liu (3): dt-bindings: pinctrl: mt8186: add pinctrl file and binding document pinctrl: add pinctrl driver on mt8186 pinctrl: canonical rsel resistance selection property .../bindings/pinctrl/pinctrl-mt8186.yaml | 313 +++ drivers/pinctrl/mediatek/Kconfig | 7 + drivers/pinctrl/mediatek/Makefile | 1 + drivers/pinctrl/mediatek/pinctrl-mt8186.c | 1313 ++++++++++ drivers/pinctrl/mediatek/pinctrl-mtk-mt8186.h | 2186 +++++++++++++++++ drivers/pinctrl/mediatek/pinctrl-paris.c | 2 +- include/dt-bindings/pinctrl/mt8186-pinfunc.h | 1174 +++++++++ 7 files changed, 4995 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml create mode 100644 drivers/pinctrl/mediatek/pinctrl-mt8186.c create mode 100644 drivers/pinctrl/mediatek/pinctrl-mtk-mt8186.h create mode 100644 include/dt-bindings/pinctrl/mt8186-pinfunc.h