| Message ID | 20220121210340.32362-1-ansuelsmth@gmail.com |
|---|---|
| Headers | show |
| Series | Multiple addition and improvement to ipq8064 gcc | expand |
Quoting Ansuel Smith (2022-01-21 13:03:36) > Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver. > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h > index 7deec14a6dee..02262d2ac899 100644 > --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h > +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h > @@ -240,7 +240,7 @@ > #define PLL14 232 > #define PLL14_VOTE 233 > #define PLL18 234 > -#define CE5_SRC 235 > +#define CE5_A_CLK 235 Technically this is ABI and changing it is bad. I see that CE5_SRC isn't used though so I guess it's OK. > #define CE5_H_CLK 236 > #define CE5_CORE_CLK 237 > #define CE3_SLEEP_CLK 238 > @@ -283,5 +283,8 @@ > #define EBI2_AON_CLK 281 > #define NSSTCM_CLK_SRC 282 > #define NSSTCM_CLK 283 > +#define CE5_A_CLK_SRC 285 > +#define CE5_H_CLK_SRC 286 > +#define CE5_CORE_CLK_SRC 287
On Tue, Jan 25, 2022 at 12:47:26PM -0800, Stephen Boyd wrote: > Quoting Ansuel Smith (2022-01-21 13:03:36) > > Add ipq8064 ce5 clk define needed for CryptoEngine in gcc driver. > > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h > > index 7deec14a6dee..02262d2ac899 100644 > > --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h > > +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h > > @@ -240,7 +240,7 @@ > > #define PLL14 232 > > #define PLL14_VOTE 233 > > #define PLL18 234 > > -#define CE5_SRC 235 > > +#define CE5_A_CLK 235 > > Technically this is ABI and changing it is bad. I see that CE5_SRC isn't > used though so I guess it's OK. > Consider that this naming comes directly from qsdk so I really don't know why it was called SRC from the start. > > #define CE5_H_CLK 236 > > #define CE5_CORE_CLK 237 > > #define CE3_SLEEP_CLK 238 > > @@ -283,5 +283,8 @@ > > #define EBI2_AON_CLK 281 > > #define NSSTCM_CLK_SRC 282 > > #define NSSTCM_CLK 283 > > +#define CE5_A_CLK_SRC 285 > > +#define CE5_H_CLK_SRC 286 > > +#define CE5_CORE_CLK_SRC 287
On Fri 21 Jan 15:03 CST 2022, Ansuel Smith wrote: > Split qcom,gcc.yaml to common and specific schema to use it as a > template for schema that needs to use the gcc bindings and require > to add additional bindings. > Nice! > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- > .../bindings/clock/qcom,gcc-common.yaml | 42 +++++++++++++++++++ > .../devicetree/bindings/clock/qcom,gcc.yaml | 25 ++--------- > 2 files changed, 46 insertions(+), 21 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml > new file mode 100644 > index 000000000000..ea1dd94d8bf1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml It seems reasonable to expect that qcom,gcc.yaml should be split out in a number of trivial qcom,gcc-platform.yaml files to define input clock etc. So how about using qcom,gcc.yaml for the common properties and for now rename the existing file to something like qcom,gcc-others.yaml ? > @@ -0,0 +1,42 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,gcc-common.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller Binding Common Bindings > + > +maintainers: > + - Stephen Boyd <sboyd@kernel.org> > + - Taniya Das <tdas@codeaurora.org> > + > +description: | No need to preserve the formatting here, so the pipe can go. Regards, Bjorn > + Common bindings for Qualcomm global clock control module which supports > + the clocks, resets and power domains. > + > +properties: > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 > + > + reg: > + maxItems: 1 > + > + protected-clocks: > + description: > + Protected clock specifier list as per common clock binding. > + > +required: > + - reg > + - '#clock-cells' > + - '#reset-cells' > + - '#power-domain-cells' > + > +additionalProperties: true > + > +... > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > index f66d703bd913..73e3ff4979c6 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > @@ -34,6 +34,9 @@ description: | > - dt-bindings/reset/qcom,gcc-mdm9615.h > - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) > > +allOf: > + - $ref: "qcom,gcc-common.yaml#" > + > properties: > compatible: > enum: > @@ -55,30 +58,10 @@ properties: > - qcom,gcc-sdm630 > - qcom,gcc-sdm660 > > - '#clock-cells': > - const: 1 > - > - '#reset-cells': > - const: 1 > - > - '#power-domain-cells': > - const: 1 > - > - reg: > - maxItems: 1 > - > - protected-clocks: > - description: > - Protected clock specifier list as per common clock binding. > - > required: > - compatible > - - reg > - - '#clock-cells' > - - '#reset-cells' > - - '#power-domain-cells' > > -additionalProperties: false > +unevaluatedProperties: false > > examples: > # Example for GCC for MSM8960: > -- > 2.33.1 >
On Mon, Jan 31, 2022 at 05:11:44PM -0600, Bjorn Andersson wrote: > On Fri 21 Jan 15:03 CST 2022, Ansuel Smith wrote: > > > Split qcom,gcc.yaml to common and specific schema to use it as a > > template for schema that needs to use the gcc bindings and require > > to add additional bindings. > > > > Nice! > > > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > > --- > > .../bindings/clock/qcom,gcc-common.yaml | 42 +++++++++++++++++++ > > .../devicetree/bindings/clock/qcom,gcc.yaml | 25 ++--------- > > 2 files changed, 46 insertions(+), 21 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml > > new file mode 100644 > > index 000000000000..ea1dd94d8bf1 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml > > It seems reasonable to expect that qcom,gcc.yaml should be split out in > a number of trivial qcom,gcc-platform.yaml files to define input clock > etc. So how about using qcom,gcc.yaml for the common properties and for > now rename the existing file to something like qcom,gcc-others.yaml > ? > Ok, just to make sure. gcc-common.yaml -> gcc.yaml (the template) gcc.yaml -> gcc-others.yaml (the generic gcc schema) Correct? > > @@ -0,0 +1,42 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/clock/qcom,gcc-common.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Qualcomm Global Clock & Reset Controller Binding Common Bindings > > + > > +maintainers: > > + - Stephen Boyd <sboyd@kernel.org> > > + - Taniya Das <tdas@codeaurora.org> > > + > > +description: | > > No need to preserve the formatting here, so the pipe can go. > > Regards, > Bjorn > > > + Common bindings for Qualcomm global clock control module which supports > > + the clocks, resets and power domains. > > + > > +properties: > > + '#clock-cells': > > + const: 1 > > + > > + '#reset-cells': > > + const: 1 > > + > > + '#power-domain-cells': > > + const: 1 > > + > > + reg: > > + maxItems: 1 > > + > > + protected-clocks: > > + description: > > + Protected clock specifier list as per common clock binding. > > + > > +required: > > + - reg > > + - '#clock-cells' > > + - '#reset-cells' > > + - '#power-domain-cells' > > + > > +additionalProperties: true > > + > > +... > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > > index f66d703bd913..73e3ff4979c6 100644 > > --- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml > > @@ -34,6 +34,9 @@ description: | > > - dt-bindings/reset/qcom,gcc-mdm9615.h > > - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) > > > > +allOf: > > + - $ref: "qcom,gcc-common.yaml#" > > + > > properties: > > compatible: > > enum: > > @@ -55,30 +58,10 @@ properties: > > - qcom,gcc-sdm630 > > - qcom,gcc-sdm660 > > > > - '#clock-cells': > > - const: 1 > > - > > - '#reset-cells': > > - const: 1 > > - > > - '#power-domain-cells': > > - const: 1 > > - > > - reg: > > - maxItems: 1 > > - > > - protected-clocks: > > - description: > > - Protected clock specifier list as per common clock binding. > > - > > required: > > - compatible > > - - reg > > - - '#clock-cells' > > - - '#reset-cells' > > - - '#power-domain-cells' > > > > -additionalProperties: false > > +unevaluatedProperties: false > > > > examples: > > # Example for GCC for MSM8960: > > -- > > 2.33.1 > >
This is an attempt in making the ipq8064 SoC actually usable. Currently many feature are missing for this SoC and devs user off-the-tree patches to make it work (example patch for missing clock, patch for cpufreq driver, patch to add missing node in the dts) I notice there was some work in modernizing the gcc driver for other qcom target but this wasn't done for ipq806x. This does exactly this, we drop any parent_names stuff and we switch to the parent_data way. We also drop the pxo and cxo source clk from gcc driver and we refer to the dts for it. This also add all the missing feature for the nss cores and the cryptoengine in them. It does also introduce the required flags to make the RPM actually work and NOT reject any command. There was an attempt in declaring these clock as core clock in the dts but this ends up in no serial as the kernel makes these clock not accessible. We just want to make the kernel NOT disable them if unused nothing more. At the end we update the ipq8064 dtsi to add the pxo and cxo tag and declare them in gcc and also fix a problem with tsens probe. v3: - Rework Documentation with Rob suggestions v2: - Fix error from Rob bot. - Add additional commits to make qcom,gcc.yaml a template - Squash parent_hws patch with the modernize patch - Create gcc_pxo instead of using long define. Ansuel Smith (15): dt-bindings: clock: split qcom,gcc.yaml to common and specific schema dt-bindings: clock: simplify qcom,gcc-apq8064 Documentation dt-bindings: clock: Document qcom,gcc-ipq8064 binding drivers: clk: qcom: gcc-ipq806x: fix wrong naming for gcc_pxo_pll8_pll0 drivers: clk: qcom: gcc-ipq806x: convert parent_names to parent_data drivers: clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents drivers: clk: qcom: gcc-ipq806x: drop hardcoded pxo and cxo source clk drivers: clk: qcom: gcc-ipq806x: add additional freq nss cores drivers: clk: qcom: gcc-ipq806x: add unusued flag for critical clock drivers: clk: qcom: gcc-ipq806x: add additional freq for sdc table dt-bindings: clock: add ipq8064 ce5 clk define drivers: clk: qcom: gcc-ipq806x: add CryptoEngine clocks dt-bindings: reset: add ipq8064 ce5 resets drivers: clk: qcom: gcc-ipq806x: add CryptoEngine resets ARM: dts: qcom: Add syscon and cxo/pxo clock to gcc node for ipq8064 .../bindings/clock/qcom,gcc-apq8064.yaml | 29 +- .../bindings/clock/qcom,gcc-common.yaml | 42 ++ .../bindings/clock/qcom,gcc-ipq8064.yaml | 76 +++ .../devicetree/bindings/clock/qcom,gcc.yaml | 31 +- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 +- drivers/clk/qcom/gcc-ipq806x.c | 638 +++++++++++++----- include/dt-bindings/clock/qcom,gcc-ipq806x.h | 5 +- include/dt-bindings/reset/qcom,gcc-ipq806x.h | 5 + 8 files changed, 615 insertions(+), 219 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-common.yaml create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml