| Message ID | 20220112103609.17421-1-leilk.liu@mediatek.com |
|---|---|
| Headers | show |
| Series | Add compatible for Mediatek MT8186 | expand |
On Wed, Jan 12, 2022 at 06:36:07PM +0800, Leilk Liu wrote: > Convert Mediatek ARM SOC's SPI Slave controller binding > to json-schema format. > > Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> > --- > .../spi/mediatek,spi-slave-mt27xx.yaml | 73 +++++++++++++++++++ > .../bindings/spi/spi-slave-mt27xx.txt | 33 --------- > 2 files changed, 73 insertions(+), 33 deletions(-) > create mode 100644 Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml > delete mode 100644 Documentation/devicetree/bindings/spi/spi-slave-mt27xx.txt > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml > new file mode 100644 > index 000000000000..3364fff08cca > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/mediatek,spi-slave-mt27xx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SPI Slave controller for MediaTek ARM SoCs > + > +maintainers: > + - Leilk Liu <leilk.liu@mediatek.com> > + > +allOf: > + - $ref: /spi/spi-controller.yaml# > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - mediatek,mt2712-spi-slave > + - items: > + - enum: > + - mediatek,mt8195-spi-slave Just: enum: - mediatek,mt2712-spi-slave - mediatek,mt8195-spi-slave > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: clock used for the clock gate Just 'maxItems: 1' > + > + clock-names: > + items: > + - const: spi > + > + assigned-clocks: > + maxItems: 1 > + description: | > + The mux clock for the given platform. > + > + assigned-clock-parents: > + maxItems: 1 > + description: | > + The parent of mux clock for the given platform. You can drop assigned-clocks. They are always allowed on nodes with 'clocks'. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt2712-clk.h> > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + spi@10013000 { > + compatible = "mediatek,mt2712-spi-slave"; > + reg = <0x10013000 0x100>; > + interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&infracfg CLK_INFRA_AO_SPI1>; > + clock-names = "spi"; > + assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>; > + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>; > + };
On Wed, Jan 12, 2022 at 06:36:08PM +0800, Leilk Liu wrote: > Convert Mediatek ARM SOC's SPI Master controller binding > to json-schema format. > > Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> > --- > .../bindings/spi/mediatek,spi-mt65xx.yaml | 99 +++++++++++++++++++ > .../devicetree/bindings/spi/spi-mt65xx.txt | 68 ------------- > 2 files changed, 99 insertions(+), 68 deletions(-) > create mode 100644 Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml > delete mode 100644 Documentation/devicetree/bindings/spi/spi-mt65xx.txt > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml > new file mode 100644 > index 000000000000..71f0cf6e5d70 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml > @@ -0,0 +1,99 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: SPI Bus controller for MediaTek ARM SoCs > + > +maintainers: > + - Leilk Liu <leilk.liu@mediatek.com> > + > +allOf: > + - $ref: /spi/spi-controller.yaml# /schemas/spi/spi-controller.yaml# > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - mediatek,mt7629-spi > + - const: mediatek,mt7622-spi > + - items: > + - enum: > + - mediatek,mt8516-spi > + - const: mediatek,mt2712-spi > + - items: > + - enum: > + - mediatek,mt6779-spi > + - mediatek,mt8192-spi > + - mediatek,mt8195-spi > + - const: mediatek,mt6765-spi > + - const: mediatek,mt2701-spi > + - const: mediatek,mt2712-spi > + - const: mediatek,mt6589-spi > + - const: mediatek,mt6765-spi > + - const: mediatek,mt6893-spi > + - const: mediatek,mt7622-spi > + - const: mediatek,mt8135-spi > + - const: mediatek,mt8173-spi > + - const: mediatek,mt8183-spi All these can be 1 enum. > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: clock used for the parent clock > + - description: clock used for the muxes clock > + - description: clock used for the clock gate > + > + clock-names: > + items: > + - const: parent-clk > + - const: sel-clk > + - const: spi-clk > + > + mediatek,pad-select: > + $ref: /schemas/types.yaml#/definitions/uint32-array > + maxItems: 4 > + items: > + enum: [0, 1, 2, 3] > + description: > + specify which pins group(ck/mi/mo/cs) spi controller used. > + This is an array. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - '#address-cells' > + - '#size-cells' > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8173-clk.h> > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + spi@1100a000 { > + compatible = "mediatek,mt8173-spi"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x1100a000 0x1000>; > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, > + <&topckgen CLK_TOP_SPI_SEL>, > + <&pericfg CLK_PERI_SPI0>; > + clock-names = "parent-clk", "sel-clk", "spi-clk"; > + cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>; > + mediatek,pad-select = <1>, <0>; > + };