| Message ID | 20220107234456.148389-1-hdegoede@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3] pinctrl: baytrail: Clear direct_irq_en flag on broken configs | expand |
Hi, On 1/8/22 01:04, Andy Shevchenko wrote: > > > On Saturday, January 8, 2022, Hans de Goede <hdegoede@redhat.com <mailto:hdegoede@redhat.com>> wrote: > > Some boards set the direct_irq_en flag in the conf0 register without > setting any of the trigger bits. The direct_irq_en flag just means that > the GPIO will send IRQs directly to the APIC instead of going through > the shared interrupt for the GPIO controller, in order for the pin to > be able to actually generate IRQs the trigger flags must still be set. > > So having the direct_irq_en flag set without any trigger flags is > non-sense, log a FW_BUG warning when encountering this and clear the flag > so that a driver can actually use the pin as IRQ through gpiod_to_irq(). > > Specifically this allows the edt-ft5x06 touchscreen driver to use > INT33FC:02 pin 3 as touchscreen IRQ on the Nextbook Ares 8 tablet, > accompanied by the following new log message: > > byt_gpio INT33FC:02: [Firmware Bug]: pin 3: direct_irq_en set without trigger, clearing > > The new byt_direct_irq_sanity_check() function also checks that the > pin is actually appointed to one of the 16 direct-IRQs which the GPIO > controller supports and on success prints debug messages like these: > > byt_gpio INT33FC:02: Pin 0: uses direct IRQ 0 (APIC 67) > byt_gpio INT33FC:02: Pin 15: uses direct IRQ 2 (APIC 69) > > > Should be these updated? Yes the " (APIC 6x)" part is gone now. I will fix this for v4. > This is useful to figure out the GPIO pin belonging to ACPI > resources like this one: "Interrupt () { 0x00000043 }" or > the other way around. > > Suggested-by: Andy Shevchenko <andy@kernel.org <mailto:andy@kernel.org>> > Signed-off-by: Hans de Goede <hdegoede@redhat.com <mailto:hdegoede@redhat.com>> > --- > Changes in v3: > - Rework code to check if the pin is assigned one of the 16 direct IRQs > (new code suggested-by Andy) > - Drop dev_dbg of the (likely?) APIC IRQ, only log the direct IRQ index > > > Thinking about direct IRQ mappings I will look into the Datasheet next week. Ok, I will wait for you to get back to me then before posting a v4. > > > Changes in v2: > - Add "FW_BUG pin %i: direct_irq_en set but no IRQ assigned, clearing" warning > --- > drivers/pinctrl/intel/pinctrl-baytrail.c | 31 ++++++++++++++++++++++-- > 1 file changed, 29 insertions(+), 2 deletions(-) > > diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c > index 4c01333e1406..508b8a1cad1f 100644 > --- a/drivers/pinctrl/intel/pinctrl-baytrail.c > +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c > @@ -32,6 +32,7 @@ > #define BYT_VAL_REG 0x008 > #define BYT_DFT_REG 0x00c > #define BYT_INT_STAT_REG 0x800 > +#define BYT_DIRECT_IRQ_REG 0x980 > #define BYT_DEBOUNCE_REG 0x9d0 > > /* BYT_CONF0_REG register bits */ > @@ -1465,6 +1466,27 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) > chip->irq_eoi(data); > } > > +static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 value) > +{ > + u8 *match, direct_irq[16]; > > > Oops, I thought it’ 16 u32 you need to read and in u8 it’s 64, which one is correct? There are 4 32 bit registers, the original code before your suggested refactoring did 4 readl()s . And each register holds 4 pin-numbers, for a total of maximum 16 direct IRQs. This is in the public datasheets, except that the public datasheet does not explain the meaning the byte (7 bits really, the 8th bit is reserved / always 0). The datasheet simply calls the 7 bits per direct IRQ "Direct0" / "Direct1", etc. That these 7 bits are actually the pin number of the pin triggering the direct IRQ is something which I figured out by looking at a number of cases where both the APIC IRQ number as well as the used pin were known, allowing me to figure out the mapping. Regards, Hans > > > + > + if (!(value & (BYT_TRIG_POS | BYT_TRIG_NEG))) { > + dev_warn(vg->dev, > + FW_BUG "pin %i: direct_irq_en set without trigger, clearing\n", pin); > + return false; > + } > + > + memcpy_fromio(direct_irq, vg->communities->pad_regs + BYT_DIRECT_IRQ_REG, > + sizeof(direct_irq)); > + match = memchr(direct_irq, pin, sizeof(direct_irq)); > + if (match) > + dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq); > + else > + dev_warn(vg->dev, FW_BUG "pin %i: direct_irq_en set but no IRQ assigned, clearing\n", pin); > + > + return match; > +} > + > static void byt_init_irq_valid_mask(struct gpio_chip *chip, > unsigned long *valid_mask, > unsigned int ngpios) > @@ -1492,8 +1514,13 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, > > value = readl(reg); > if (value & BYT_DIRECT_IRQ_EN) { > - clear_bit(i, valid_mask); > - dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i); > + if (byt_direct_irq_sanity_check(vg, i, value)) { > + clear_bit(i, valid_mask); > + } else { > + value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | > + BYT_TRIG_NEG | BYT_TRIG_LVL); > + writel(value, reg); > + } > } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) { > byt_gpio_clear_triggering(vg, i); > dev_dbg(vg->dev, "disabling GPIO %d\n", i); > -- > 2.33.1 > > > > -- > With Best Regards, > Andy Shevchenko > >
Hi Hans,
I love your patch! Perhaps something to improve:
[auto build test WARNING on linusw-pinctrl/devel]
[also build test WARNING on v5.16-rc8 next-20220107]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Hans-de-Goede/pinctrl-baytrail-Clear-direct_irq_en-flag-on-broken-configs/20220108-074637
base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel
config: i386-randconfig-c001-20220107 (https://download.01.org/0day-ci/archive/20220109/202201090203.kgCw6bSd-lkp@intel.com/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f3a344d2125fa37e59bae1b0874442c650a19607)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/fc9eb527f62b0bebde64745ec5b0a838fde7ef41
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Hans-de-Goede/pinctrl-baytrail-Clear-direct_irq_en-flag-on-broken-configs/20220108-074637
git checkout fc9eb527f62b0bebde64745ec5b0a838fde7ef41
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/pinctrl/intel/
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/pinctrl/intel/pinctrl-baytrail.c:1483:58: warning: format specifies type 'long' but the argument has type 'int' [-Wformat]
dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq);
~~~ ^~~~~~~~~~~~~~~~~~
%d
include/linux/dev_printk.h:163:47: note: expanded from macro 'dev_dbg'
dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \
~~~ ^~~~~~~~~~~
include/linux/dev_printk.h:129:34: note: expanded from macro 'dev_printk'
_dev_printk(level, dev, fmt, ##__VA_ARGS__); \
~~~ ^~~~~~~~~~~
1 warning generated.
vim +1483 drivers/pinctrl/intel/pinctrl-baytrail.c
1468
1469 static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 value)
1470 {
1471 u8 *match, direct_irq[16];
1472
1473 if (!(value & (BYT_TRIG_POS | BYT_TRIG_NEG))) {
1474 dev_warn(vg->dev,
1475 FW_BUG "pin %i: direct_irq_en set without trigger, clearing\n", pin);
1476 return false;
1477 }
1478
1479 memcpy_fromio(direct_irq, vg->communities->pad_regs + BYT_DIRECT_IRQ_REG,
1480 sizeof(direct_irq));
1481 match = memchr(direct_irq, pin, sizeof(direct_irq));
1482 if (match)
> 1483 dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq);
1484 else
1485 dev_warn(vg->dev, FW_BUG "pin %i: direct_irq_en set but no IRQ assigned, clearing\n", pin);
1486
1487 return match;
1488 }
1489
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi, On 1/8/22 19:54, kernel test robot wrote: > Hi Hans, > > I love your patch! Perhaps something to improve: > > [auto build test WARNING on linusw-pinctrl/devel] > [also build test WARNING on v5.16-rc8 next-20220107] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: https://github.com/0day-ci/linux/commits/Hans-de-Goede/pinctrl-baytrail-Clear-direct_irq_en-flag-on-broken-configs/20220108-074637 > base: https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git devel > config: i386-randconfig-c001-20220107 (https://download.01.org/0day-ci/archive/20220109/202201090203.kgCw6bSd-lkp@intel.com/config) > compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project f3a344d2125fa37e59bae1b0874442c650a19607) > reproduce (this is a W=1 build): > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross > chmod +x ~/bin/make.cross > # https://github.com/0day-ci/linux/commit/fc9eb527f62b0bebde64745ec5b0a838fde7ef41 > git remote add linux-review https://github.com/0day-ci/linux > git fetch --no-tags linux-review Hans-de-Goede/pinctrl-baytrail-Clear-direct_irq_en-flag-on-broken-configs/20220108-074637 > git checkout fc9eb527f62b0bebde64745ec5b0a838fde7ef41 > # save the config file to linux build tree > mkdir build_dir > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/pinctrl/intel/ > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot <lkp@intel.com> > > All warnings (new ones prefixed by >>): > >>> drivers/pinctrl/intel/pinctrl-baytrail.c:1483:58: warning: format specifies type 'long' but the argument has type 'int' [-Wformat] > dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq); > ~~~ ^~~~~~~~~~~~~~~~~~ > %d > include/linux/dev_printk.h:163:47: note: expanded from macro 'dev_dbg' > dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \ > ~~~ ^~~~~~~~~~~ > include/linux/dev_printk.h:129:34: note: expanded from macro 'dev_printk' > _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ > ~~~ ^~~~~~~~~~~ > 1 warning generated. Hmm, ok. so x86_64 needs a %ld for the pointer arithmic result on i386 needs a %d without the 'l' what fun. I'll just store it in a temp int variable in the next version. I need to do a new version anyways since I ended up going down a bit of a rabithole wrt the direct IRQ stuff and I now finally completely understand how this all works including how the trigger bits in the pinctrl work together with the ones in the IO-APIC. See the next version of this patch for details. Regards, Hans
Hi, On 1/12/22 21:42, Andy Shevchenko wrote: > On Wed, Jan 12, 2022 at 09:20:25PM +0100, Hans de Goede wrote: >> On 1/8/22 10:59, Hans de Goede wrote: >>> On 1/8/22 01:04, Andy Shevchenko wrote: >>>> On Saturday, January 8, 2022, Hans de Goede <hdegoede@redhat.com <mailto:hdegoede@redhat.com>> wrote: > > ... > >>>> byt_gpio INT33FC:02: Pin 0: uses direct IRQ 0 (APIC 67) >>>> byt_gpio INT33FC:02: Pin 15: uses direct IRQ 2 (APIC 69) >>>> >>>> >>>> Should be these updated? >>> >>> Yes the " (APIC 6x)" part is gone now. I will fix this for v4. >>> >>>> This is useful to figure out the GPIO pin belonging to ACPI >>>> resources like this one: "Interrupt () { 0x00000043 }" or >>>> the other way around. >>>> >>>> Suggested-by: Andy Shevchenko <andy@kernel.org <mailto:andy@kernel.org>> >>>> Signed-off-by: Hans de Goede <hdegoede@redhat.com <mailto:hdegoede@redhat.com>> >>>> --- >>>> Changes in v3: >>>> - Rework code to check if the pin is assigned one of the 16 direct IRQs >>>> (new code suggested-by Andy) >>>> - Drop dev_dbg of the (likely?) APIC IRQ, only log the direct IRQ index >>>> >>>> >>>> Thinking about direct IRQ mappings I will look into the Datasheet next week. >>> >>> Ok, I will wait for you to get back to me then before posting a v4. >> >> Note I've found the direct IRQ to IO-APIC pin mappings now, they are >> described in: atom-e3800-family-datasheet.pdf, so I've re-added >> the APIC IRQ to the printed log msg for v4. > > You mean below? > > The 16 GPSCORE direct IRQs are mapped to IOAPIC_IRQ [66:51]. > The 16 GPSSUS direct IRQs are mapped to IOAPIC_IRQ [82:67]. Yes. Regards, Hans
Hi, On 1/12/22 21:44, Andy Shevchenko wrote: > On Wed, Jan 12, 2022 at 08:58:00PM +0100, Hans de Goede wrote: >> On 1/8/22 19:54, kernel test robot wrote: > >>>>> drivers/pinctrl/intel/pinctrl-baytrail.c:1483:58: warning: format specifies type 'long' but the argument has type 'int' [-Wformat] >>> dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq); >>> ~~~ ^~~~~~~~~~~~~~~~~~ >>> %d >>> include/linux/dev_printk.h:163:47: note: expanded from macro 'dev_dbg' >>> dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \ >>> ~~~ ^~~~~~~~~~~ >>> include/linux/dev_printk.h:129:34: note: expanded from macro 'dev_printk' >>> _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ >>> ~~~ ^~~~~~~~~~~ >>> 1 warning generated. >> >> Hmm, ok. so x86_64 needs a %ld for the pointer arithmic result on i386 needs a %d >> without the 'l' what fun. I'll just store it in a temp int variable in the next >> version. > > Why not to use uintptr_t and corresponding specifier (or ptrdiff_t)? those or long resp. int depending on the arch to, but I could just cast the result of the "match - direct_irq" pointer arithmetic to an int, however due to the other changes in v4 using a local variable seems cleaner, see the v4 which I'm about to send out in a couple of minutes. I think you will find v4 interesting because I've done a detailed analysis of how the pinctrl conf0 pad register trigger bits and the IO-APIC trigger bits work together, which is quite enlightening to how this all works (and AFAICT not documented). Regards, Hans
On Wed, Jan 12, 2022 at 09:50:47PM +0100, Hans de Goede wrote: > On 1/12/22 21:44, Andy Shevchenko wrote: ... > I think you will find v4 interesting because I've done a detailed > analysis of how the pinctrl conf0 pad register trigger bits and the IO-APIC > trigger bits work together, which is quite enlightening to how this all > works (and AFAICT not documented). With excitement looking forward to it!
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c index 4c01333e1406..508b8a1cad1f 100644 --- a/drivers/pinctrl/intel/pinctrl-baytrail.c +++ b/drivers/pinctrl/intel/pinctrl-baytrail.c @@ -32,6 +32,7 @@ #define BYT_VAL_REG 0x008 #define BYT_DFT_REG 0x00c #define BYT_INT_STAT_REG 0x800 +#define BYT_DIRECT_IRQ_REG 0x980 #define BYT_DEBOUNCE_REG 0x9d0 /* BYT_CONF0_REG register bits */ @@ -1465,6 +1466,27 @@ static void byt_gpio_irq_handler(struct irq_desc *desc) chip->irq_eoi(data); } +static bool byt_direct_irq_sanity_check(struct intel_pinctrl *vg, int pin, u32 value) +{ + u8 *match, direct_irq[16]; + + if (!(value & (BYT_TRIG_POS | BYT_TRIG_NEG))) { + dev_warn(vg->dev, + FW_BUG "pin %i: direct_irq_en set without trigger, clearing\n", pin); + return false; + } + + memcpy_fromio(direct_irq, vg->communities->pad_regs + BYT_DIRECT_IRQ_REG, + sizeof(direct_irq)); + match = memchr(direct_irq, pin, sizeof(direct_irq)); + if (match) + dev_dbg(vg->dev, "Pin %i: uses direct IRQ %ld\n", pin, match - direct_irq); + else + dev_warn(vg->dev, FW_BUG "pin %i: direct_irq_en set but no IRQ assigned, clearing\n", pin); + + return match; +} + static void byt_init_irq_valid_mask(struct gpio_chip *chip, unsigned long *valid_mask, unsigned int ngpios) @@ -1492,8 +1514,13 @@ static void byt_init_irq_valid_mask(struct gpio_chip *chip, value = readl(reg); if (value & BYT_DIRECT_IRQ_EN) { - clear_bit(i, valid_mask); - dev_dbg(vg->dev, "excluding GPIO %d from IRQ domain\n", i); + if (byt_direct_irq_sanity_check(vg, i, value)) { + clear_bit(i, valid_mask); + } else { + value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | + BYT_TRIG_NEG | BYT_TRIG_LVL); + writel(value, reg); + } } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) { byt_gpio_clear_triggering(vg, i); dev_dbg(vg->dev, "disabling GPIO %d\n", i);
Some boards set the direct_irq_en flag in the conf0 register without setting any of the trigger bits. The direct_irq_en flag just means that the GPIO will send IRQs directly to the APIC instead of going through the shared interrupt for the GPIO controller, in order for the pin to be able to actually generate IRQs the trigger flags must still be set. So having the direct_irq_en flag set without any trigger flags is non-sense, log a FW_BUG warning when encountering this and clear the flag so that a driver can actually use the pin as IRQ through gpiod_to_irq(). Specifically this allows the edt-ft5x06 touchscreen driver to use INT33FC:02 pin 3 as touchscreen IRQ on the Nextbook Ares 8 tablet, accompanied by the following new log message: byt_gpio INT33FC:02: [Firmware Bug]: pin 3: direct_irq_en set without trigger, clearing The new byt_direct_irq_sanity_check() function also checks that the pin is actually appointed to one of the 16 direct-IRQs which the GPIO controller supports and on success prints debug messages like these: byt_gpio INT33FC:02: Pin 0: uses direct IRQ 0 (APIC 67) byt_gpio INT33FC:02: Pin 15: uses direct IRQ 2 (APIC 69) This is useful to figure out the GPIO pin belonging to ACPI resources like this one: "Interrupt () { 0x00000043 }" or the other way around. Suggested-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> --- Changes in v3: - Rework code to check if the pin is assigned one of the 16 direct IRQs (new code suggested-by Andy) - Drop dev_dbg of the (likely?) APIC IRQ, only log the direct IRQ index Changes in v2: - Add "FW_BUG pin %i: direct_irq_en set but no IRQ assigned, clearing" warning --- drivers/pinctrl/intel/pinctrl-baytrail.c | 31 ++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-)