| Message ID | 20211217093325.30612-7-conor.dooley@microchip.com |
|---|---|
| State | New |
| Headers | show |
| Series | Update the Icicle Kit device tree | expand |
On 17/12/2021 10:33, conor.dooley@microchip.com wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Add device tree bindings for the hardware rng device accessed via > the system services on the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../bindings/rng/microchip,mpfs-rng.yaml | 29 +++++++++++++++++++ > 1 file changed, 29 insertions(+) > create mode 100644 Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml > > diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml > new file mode 100644 > index 000000000000..32cbc37c9292 > --- /dev/null > +++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml > @@ -0,0 +1,29 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip MPFS random number generator > + > +maintainers: > + - Conor Dooley <conor.dooley@microchip.com> > + > +description: | > + The hardware random number generator on the Polarfire SoC is > + accessed via the mailbox interface provided by the system controller > + > +properties: > + compatible: > + const: microchip,mpfs-rng > + > +required: > + - compatible > + > +additionalProperties: false > + > +examples: > + - | > + hwrandom: hwrandom { Three topics: 1. Node name (as most of others are using): rng 2. skip the label, not helping in example. 3. This looks very simple, so I wonder if the bindings are complete. No IO space/address... How is it going to be instantiated? > + compatible = "microchip,mpfs-rng"; > + }; > Best regards, Krzysztof
On 17/12/2021 15:53, Krzysztof Kozlowski wrote: > On 17/12/2021 10:33, conor.dooley@microchip.com wrote: >> From: Conor Dooley <conor.dooley@microchip.com> >> >> Add device tree bindings for the hardware rng device accessed via >> the system services on the Microchip PolarFire SoC. >> >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> >> --- >> .../bindings/rng/microchip,mpfs-rng.yaml | 29 +++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >> >> diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >> new file mode 100644 >> index 000000000000..32cbc37c9292 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >> @@ -0,0 +1,29 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#" >> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >> + >> +title: Microchip MPFS random number generator >> + >> +maintainers: >> + - Conor Dooley <conor.dooley@microchip.com> >> + >> +description: | >> + The hardware random number generator on the Polarfire SoC is >> + accessed via the mailbox interface provided by the system controller >> + >> +properties: >> + compatible: >> + const: microchip,mpfs-rng >> + >> +required: >> + - compatible >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + hwrandom: hwrandom { > > Three topics: > 1. Node name (as most of others are using): rng > 2. skip the label, not helping in example. > 3. This looks very simple, so I wonder if the bindings are complete. No > IO space/address... How is it going to be instantiated? > OK, now I saw the usage in DTS. I have doubts this makes sense as separate bindings. It looks like integrated part of syscontroller, so maybe make it part of that binding? Or at least add ref to syscontroller bindings that such child is expected. Best regards, Krzysztof
On 17/12/2021 15:07, Krzysztof Kozlowski wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 17/12/2021 15:53, Krzysztof Kozlowski wrote: >> On 17/12/2021 10:33, conor.dooley@microchip.com wrote: >>> From: Conor Dooley <conor.dooley@microchip.com> >>> >>> Add device tree bindings for the hardware rng device accessed via >>> the system services on the Microchip PolarFire SoC. >>> >>> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> >>> --- >>> .../bindings/rng/microchip,mpfs-rng.yaml | 29 +++++++++++++++++++ >>> 1 file changed, 29 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >>> new file mode 100644 >>> index 000000000000..32cbc37c9292 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml >>> @@ -0,0 +1,29 @@ >>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>> +%YAML 1.2 >>> +--- >>> +$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#" >>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#" >>> + >>> +title: Microchip MPFS random number generator >>> + >>> +maintainers: >>> + - Conor Dooley <conor.dooley@microchip.com> >>> + >>> +description: | >>> + The hardware random number generator on the Polarfire SoC is >>> + accessed via the mailbox interface provided by the system controller >>> + >>> +properties: >>> + compatible: >>> + const: microchip,mpfs-rng >>> + >>> +required: >>> + - compatible >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + hwrandom: hwrandom { >> >> Three topics: >> 1. Node name (as most of others are using): rng >> 2. skip the label, not helping in example. >> 3. This looks very simple, so I wonder if the bindings are complete. No >> IO space/address... How is it going to be instantiated? >> > > OK, now I saw the usage in DTS. I have doubts this makes sense as > separate bindings. It looks like integrated part of syscontroller, so > maybe make it part of that binding? Or at least add ref to syscontroller > bindings that such child is expected. Acking the rest of this, re: adding the ref: is what is being done in patch 03/17 insufficient? > > > Best regards, > Krzysztof >
‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐ On Friday, December 17th, 2021 at 15:47, Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> wrote: > On 17/12/2021 16:22, Conor.Dooley@microchip.com wrote: > > > On 17/12/2021 15:07, Krzysztof Kozlowski wrote: > > > > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > > > On 17/12/2021 15:53, Krzysztof Kozlowski wrote: > > > > > > > On 17/12/2021 10:33, conor.dooley@microchip.com wrote: > > > > > > > > > From: Conor Dooley conor.dooley@microchip.com > > > > > > > > > > Add device tree bindings for the hardware rng device accessed via > > > > > > > > > > the system services on the Microchip PolarFire SoC. > > > > > > > > > > Signed-off-by: Conor Dooley conor.dooley@microchip.com > > > > > ------------------------------------------------------ > > > > > > > > Three topics: > > > > > > > > 1. Node name (as most of others are using): rng > > > > 2. skip the label, not helping in example. > > > > 3. This looks very simple, so I wonder if the bindings are complete. No > > > > > > > > IO space/address... How is it going to be instantiated? > > > OK, now I saw the usage in DTS. I have doubts this makes sense as > > > separate bindings. It looks like integrated part of syscontroller, so > > > maybe make it part of that binding? Or at least add ref to syscontroller > > > bindings that such child is expected. > > Acking the rest of this, re: adding the ref: is what is being done in > > patch 03/17 insufficient? > Ops, I missed the 03/17. Yeah, it looks it is sufficient and in such > case I think you do not need this patch. The compatible is documented in > 03/17. The same for sysserv. Grand, that makes things easier. Conor. > > Best regards, > > Krzysztof > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml new file mode 100644 index 000000000000..32cbc37c9292 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Microchip MPFS random number generator + +maintainers: + - Conor Dooley <conor.dooley@microchip.com> + +description: | + The hardware random number generator on the Polarfire SoC is + accessed via the mailbox interface provided by the system controller + +properties: + compatible: + const: microchip,mpfs-rng + +required: + - compatible + +additionalProperties: false + +examples: + - | + hwrandom: hwrandom { + compatible = "microchip,mpfs-rng"; + };