diff mbox series

[3/3] target/m68k: Implement FTRAPcc

Message ID 20211130103752.72099-4-richard.henderson@linaro.org
State New
Headers show
Series target/m68k: Implement conditional traps | expand

Commit Message

Richard Henderson Nov. 30, 2021, 10:37 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

Comments

Richard Henderson Nov. 30, 2021, 11:32 a.m. UTC | #1 
On 11/30/21 11:37 AM, Richard Henderson wrote:
> +    INSN(ftrapcc,   f278, ff80, FPU);

Whoops, mask should be fff8.


r~
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index cf29f35d91..3c04f9d1a9 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -5547,6 +5547,43 @@  DISAS_INSN(fscc)
     tcg_temp_free(tmp);
 }
 
+DISAS_INSN(ftrapcc)
+{
+    DisasCompare c;
+    TCGLabel *over;
+    uint16_t ext;
+    int cond;
+
+    ext = read_im16(env, s);
+    cond = ext & 0x3f;
+
+    /* Consume and discard the immediate operand. */
+    switch (extract32(insn, 0, 3)) {
+    case 2: /* ftrapcc.w */
+        (void)read_im16(env, s);
+        break;
+    case 3: /* ftrapcc.l */
+        (void)read_im32(env, s);
+        break;
+    case 4: /* ftrapcc (no operand) */
+        break;
+    default:
+        /* Illegal insn */
+        disas_undef(env, s, insn);
+        return;
+    }
+
+    /* Jump over if !cond. */
+    gen_fcc_cond(&c, s, cond);
+    update_cc_op(s);
+    over = gen_new_label();
+    tcg_gen_brcond_i32(tcg_invert_cond(c.tcond), c.v1, c.v2, over);
+    free_cond(&c);
+
+    gen_exception(s, s->base.pc_next, EXCP_TRAPCC);
+    gen_set_label(over);
+}
+
 #if defined(CONFIG_SOFTMMU)
 DISAS_INSN(frestore)
 {
@@ -6170,6 +6207,7 @@  void register_m68k_insns (CPUM68KState *env)
     INSN(fbcc,      f280, ffc0, CF_FPU);
     INSN(fpu,       f200, ffc0, FPU);
     INSN(fscc,      f240, ffc0, FPU);
+    INSN(ftrapcc,   f278, ff80, FPU);
     INSN(fbcc,      f280, ff80, FPU);
 #if defined(CONFIG_SOFTMMU)
     INSN(frestore,  f340, ffc0, CF_FPU);