[PULL,v2,04/12] tests/qtest/libqos: add SDHCI commands

Message ID	20211102182519.320319-5-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL v2 04/12] tests/qtest/libqos: add SDHCI commands Date: Tue, 2 Nov 2021 14:25:11 -0400 Message-Id: <20211102182519.320319-5-richard.henderson@linaro.org> In-Reply-To: <20211102182519.320319-1-richard.henderson@linaro.org> References: <20211102182519.320319-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::72c; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x72c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Cc: Hao Wu <wuhaotsh@google.com>, Tyrone Ting <kfting@nuvoton.com>, Shengtan Mao <stmao@google.com>, Chris Rauer <crauer@google.com>, Peter Maydell <peter.maydell@linaro.org> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	target/arm patch queue \| expand [PULL,v2,00/12] target/arm patch queue [PULL,v2,01/12] hw/sd: add nuvoton MMC [PULL,v2,02/12] hw/arm: Add Nuvoton SD module to board [PULL,v2,03/12] hw/arm: Attach MMC to quanta-gbs-bmc [PULL,v2,04/12] tests/qtest/libqos: add SDHCI commands [PULL,v2,05/12] target/arm: Advertise MVE to gdb when present [PULL,v2,06/12] target/arm: Use tcg_constant_i32() in op_smlad() [PULL,v2,07/12] target/arm: Introduce store_cpu_field_constant() helper [PULL,v2,08/12] target/arm: Use the constant variant of store_cpu_field() when possible [PULL,v2,09/12] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() [PULL,v2,10/12] target/arm: Use tcg_constant_i32() in gen_rev16() [PULL,v2,11/12] hw/arm/virt: Rename default_bus_bypass_iommu [PULL,v2,12/12] hvf: arm: Ignore cache operations on MMIO

Hi, I've sent a new patch set which uses memcpy here. Thank you! On Tue, Nov 2, 2021 at 11:25 AM Richard Henderson < richard.henderson@linaro.org> wrote: > From: Shengtan Mao <stmao@google.com> > > Signed-off-by: Shengtan Mao <stmao@google.com> > Signed-off-by: Hao Wu <wuhaotsh@google.com> > Reviewed-by: Hao Wu <wuhaotsh@google.com> > Reviewed-by: Chris Rauer <crauer@google.com> > Reviewed-by: Tyrone Ting <kfting@nuvoton.com> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Message-Id: <20211008002628.1958285-5-wuhaotsh@google.com> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tests/qtest/libqos/sdhci-cmd.h | 70 ++++++++++++++++++++ > tests/qtest/libqos/sdhci-cmd.c | 116 +++++++++++++++++++++++++++++++++ > tests/qtest/libqos/meson.build | 1 + > 3 files changed, 187 insertions(+) > create mode 100644 tests/qtest/libqos/sdhci-cmd.h > create mode 100644 tests/qtest/libqos/sdhci-cmd.c > > diff --git a/tests/qtest/libqos/sdhci-cmd.h > b/tests/qtest/libqos/sdhci-cmd.h > new file mode 100644 > index 0000000000..64763c5a2a > --- /dev/null > +++ b/tests/qtest/libqos/sdhci-cmd.h > @@ -0,0 +1,70 @@ > +/* > + * MMC Host Controller Commands > + * > + * Copyright (c) 2021 Google LLC > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, but > WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License > + * for more details. > + */ > + > +#include "libqtest.h" > + > +/* more details at hw/sd/sdhci-internal.h */ > +#define SDHC_BLKSIZE 0x04 > +#define SDHC_BLKCNT 0x06 > +#define SDHC_ARGUMENT 0x08 > +#define SDHC_TRNMOD 0x0C > +#define SDHC_CMDREG 0x0E > +#define SDHC_BDATA 0x20 > +#define SDHC_PRNSTS 0x24 > +#define SDHC_BLKGAP 0x2A > +#define SDHC_CLKCON 0x2C > +#define SDHC_SWRST 0x2F > +#define SDHC_CAPAB 0x40 > +#define SDHC_MAXCURR 0x48 > +#define SDHC_HCVER 0xFE > + > +/* TRNSMOD Reg */ > +#define SDHC_TRNS_BLK_CNT_EN 0x0002 > +#define SDHC_TRNS_READ 0x0010 > +#define SDHC_TRNS_WRITE 0x0000 > +#define SDHC_TRNS_MULTI 0x0020 > + > +/* CMD Reg */ > +#define SDHC_CMD_DATA_PRESENT (1 << 5) > +#define SDHC_ALL_SEND_CID (2 << 8) > +#define SDHC_SEND_RELATIVE_ADDR (3 << 8) > +#define SDHC_SELECT_DESELECT_CARD (7 << 8) > +#define SDHC_SEND_CSD (9 << 8) > +#define SDHC_STOP_TRANSMISSION (12 << 8) > +#define SDHC_READ_MULTIPLE_BLOCK (18 << 8) > +#define SDHC_WRITE_MULTIPLE_BLOCK (25 << 8) > +#define SDHC_APP_CMD (55 << 8) > + > +/* SWRST Reg */ > +#define SDHC_RESET_ALL 0x01 > + > +/* CLKCTRL Reg */ > +#define SDHC_CLOCK_INT_EN 0x0001 > +#define SDHC_CLOCK_INT_STABLE 0x0002 > +#define SDHC_CLOCK_SDCLK_EN (1 << 2) > + > +/* Set registers needed to send commands to SD */ > +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, > + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, > + uint16_t cmdreg); > + > +/* Read at most 1 block of SD using non-DMA */ > +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, > + size_t count); > + > +/* Write at most 1 block of SD using non-DMA */ > +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, > + size_t count, size_t blksize); > diff --git a/tests/qtest/libqos/sdhci-cmd.c > b/tests/qtest/libqos/sdhci-cmd.c > new file mode 100644 > index 0000000000..2d9e518341 > --- /dev/null > +++ b/tests/qtest/libqos/sdhci-cmd.c > @@ -0,0 +1,116 @@ > +/* > + * MMC Host Controller Commands > + * > + * Copyright (c) 2021 Google LLC > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, but > WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License > + * for more details. > + */ > + > +#include "qemu/osdep.h" > +#include "sdhci-cmd.h" > +#include "libqtest.h" > + > +static ssize_t read_fifo(QTestState *qts, uint64_t reg, char *msg, size_t > count) > +{ > + uint32_t mask = 0xff; > + size_t index = 0; > + uint32_t msg_frag; > + int size; > + while (index < count) { > + size = count - index; > + if (size > 4) { > + size = 4; > + } > + msg_frag = qtest_readl(qts, reg); > + while (size > 0) { > + msg[index] = msg_frag & mask; > + if (msg[index++] == 0) { > + return index; > + } > + msg_frag >>= 8; > + --size; > + } > + } > + return index; > +} > + > +static void write_fifo(QTestState *qts, uint64_t reg, const char *msg, > + size_t count) > +{ > + size_t index = 0; > + uint32_t msg_frag; > + int size; > + int frag_i; > + while (index < count) { > + size = count - index; > + if (size > 4) { > + size = 4; > + } > + msg_frag = 0; > + frag_i = 0; > + while (frag_i < size) { > + msg_frag |= ((uint32_t)msg[index++]) << (frag_i * 8); > + ++frag_i; > + } > + qtest_writel(qts, reg, msg_frag); > + } > +} > + > +static void fill_block(QTestState *qts, uint64_t reg, int count) > +{ > + while (--count >= 0) { > + qtest_writel(qts, reg, 0); > + } > +} > + > +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, > + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, > + uint16_t cmdreg) > +{ > + qtest_writew(qts, base_addr + SDHC_BLKSIZE, blksize); > + qtest_writew(qts, base_addr + SDHC_BLKCNT, blkcnt); > + qtest_writel(qts, base_addr + SDHC_ARGUMENT, argument); > + qtest_writew(qts, base_addr + SDHC_TRNMOD, trnmod); > + qtest_writew(qts, base_addr + SDHC_CMDREG, cmdreg); > +} > + > +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, > + size_t count) > +{ > + sdhci_cmd_regs(qts, base_addr, count, 1, 0, > + SDHC_TRNS_MULTI | SDHC_TRNS_READ | > SDHC_TRNS_BLK_CNT_EN, > + SDHC_READ_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); > + > + /* read sd fifo_buffer */ > + ssize_t bytes_read = read_fifo(qts, base_addr + SDHC_BDATA, msg, > count); > + > + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, > + SDHC_TRNS_MULTI | SDHC_TRNS_READ | > SDHC_TRNS_BLK_CNT_EN, > + SDHC_STOP_TRANSMISSION); > + > + return bytes_read; > +} > + > +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, > + size_t count, size_t blksize) > +{ > + sdhci_cmd_regs(qts, base_addr, blksize, 1, 0, > + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | > SDHC_TRNS_BLK_CNT_EN, > + SDHC_WRITE_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); > + > + /* write to sd fifo_buffer */ > + write_fifo(qts, base_addr + SDHC_BDATA, msg, count); > + fill_block(qts, base_addr + SDHC_BDATA, (blksize - count) / 4); > + > + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, > + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | > SDHC_TRNS_BLK_CNT_EN, > + SDHC_STOP_TRANSMISSION); > +} > diff --git a/tests/qtest/libqos/meson.build > b/tests/qtest/libqos/meson.build > index 1f5c8f1053..4af1f04787 100644 > --- a/tests/qtest/libqos/meson.build > +++ b/tests/qtest/libqos/meson.build > @@ -5,6 +5,7 @@ libqos_srcs = files('../libqtest.c', > 'fw_cfg.c', > 'malloc.c', > 'libqos.c', > + 'sdhci-cmd.c', > > # spapr > 'malloc-spapr.c', > -- > 2.25.1 > > <div dir="ltr">Hi,<div> </div><div>I've sent a new patch set which uses memcpy here. Thank you!</div><div> </div></div> <div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Nov 2, 2021 at 11:25 AM Richard Henderson <<a href="mailto:richard.henderson@linaro.org">richard.henderson@linaro.org</a>> wrote: </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">From: Shengtan Mao <<a href="mailto:stmao@google.com" target="_blank">stmao@google.com</a>> Signed-off-by: Shengtan Mao <<a href="mailto:stmao@google.com" target="_blank">stmao@google.com</a>> Signed-off-by: Hao Wu <<a href="mailto:wuhaotsh@google.com" target="_blank">wuhaotsh@google.com</a>> Reviewed-by: Hao Wu <<a href="mailto:wuhaotsh@google.com" target="_blank">wuhaotsh@google.com</a>> Reviewed-by: Chris Rauer <<a href="mailto:crauer@google.com" target="_blank">crauer@google.com</a>> Reviewed-by: Tyrone Ting <<a href="mailto:kfting@nuvoton.com" target="_blank">kfting@nuvoton.com</a>> Reviewed-by: Peter Maydell <<a href="mailto:peter.maydell@linaro.org" target="_blank">peter.maydell@linaro.org</a>> Message-Id: <<a href="mailto:20211008002628.1958285-5-wuhaotsh@google.com" target="_blank">20211008002628.1958285-5-wuhaotsh@google.com</a>> Signed-off-by: Richard Henderson <<a href="mailto:richard.henderson@linaro.org" target="_blank">richard.henderson@linaro.org</a>> --- tests/qtest/libqos/sdhci-cmd.h | 70 ++++++++++++++++++++ tests/qtest/libqos/sdhci-cmd.c | 116 +++++++++++++++++++++++++++++++++ tests/qtest/libqos/meson.build | 1 + 3 files changed, 187 insertions(+) create mode 100644 tests/qtest/libqos/sdhci-cmd.h create mode 100644 tests/qtest/libqos/sdhci-cmd.c diff --git a/tests/qtest/libqos/sdhci-cmd.h b/tests/qtest/libqos/sdhci-cmd.h new file mode 100644 index 0000000000..64763c5a2a --- /dev/null +++ b/tests/qtest/libqos/sdhci-cmd.h @@ -0,0 +1,70 @@ +/* + * MMC Host Controller Commands + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "libqtest.h" + +/* more details at hw/sd/sdhci-internal.h */ +#define SDHC_BLKSIZE 0x04 +#define SDHC_BLKCNT 0x06 +#define SDHC_ARGUMENT 0x08 +#define SDHC_TRNMOD 0x0C +#define SDHC_CMDREG 0x0E +#define SDHC_BDATA 0x20 +#define SDHC_PRNSTS 0x24 +#define SDHC_BLKGAP 0x2A +#define SDHC_CLKCON 0x2C +#define SDHC_SWRST 0x2F +#define SDHC_CAPAB 0x40 +#define SDHC_MAXCURR 0x48 +#define SDHC_HCVER 0xFE + +/* TRNSMOD Reg */ +#define SDHC_TRNS_BLK_CNT_EN 0x0002 +#define SDHC_TRNS_READ 0x0010 +#define SDHC_TRNS_WRITE 0x0000 +#define SDHC_TRNS_MULTI 0x0020 + +/* CMD Reg */ +#define SDHC_CMD_DATA_PRESENT (1 << 5) +#define SDHC_ALL_SEND_CID (2 << 8) +#define SDHC_SEND_RELATIVE_ADDR (3 << 8) +#define SDHC_SELECT_DESELECT_CARD (7 << 8) +#define SDHC_SEND_CSD (9 << 8) +#define SDHC_STOP_TRANSMISSION (12 << 8) +#define SDHC_READ_MULTIPLE_BLOCK (18 << 8) +#define SDHC_WRITE_MULTIPLE_BLOCK (25 << 8) +#define SDHC_APP_CMD (55 << 8) + +/* SWRST Reg */ +#define SDHC_RESET_ALL 0x01 + +/* CLKCTRL Reg */ +#define SDHC_CLOCK_INT_EN 0x0001 +#define SDHC_CLOCK_INT_STABLE 0x0002 +#define SDHC_CLOCK_SDCLK_EN (1 << 2) + +/* Set registers needed to send commands to SD */ +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, + uint16_t cmdreg); + +/* Read at most 1 block of SD using non-DMA */ +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, + size_t count); + +/* Write at most 1 block of SD using non-DMA */ +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, + size_t count, size_t blksize); diff --git a/tests/qtest/libqos/sdhci-cmd.c b/tests/qtest/libqos/sdhci-cmd.c new file mode 100644 index 0000000000..2d9e518341 --- /dev/null +++ b/tests/qtest/libqos/sdhci-cmd.c @@ -0,0 +1,116 @@ +/* + * MMC Host Controller Commands + * + * Copyright (c) 2021 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "sdhci-cmd.h" +#include "libqtest.h" + +static ssize_t read_fifo(QTestState *qts, uint64_t reg, char *msg, size_t count) +{ + uint32_t mask = 0xff; + size_t index = 0; + uint32_t msg_frag; + int size; + while (index < count) { + size = count - index; + if (size > 4) { + size = 4; + } + msg_frag = qtest_readl(qts, reg); + while (size > 0) { + msg[index] = msg_frag & mask; + if (msg[index++] == 0) { + return index; + } + msg_frag >>= 8; + --size; + } + } + return index; +} + +static void write_fifo(QTestState *qts, uint64_t reg, const char *msg, + size_t count) +{ + size_t index = 0; + uint32_t msg_frag; + int size; + int frag_i; + while (index < count) { + size = count - index; + if (size > 4) { + size = 4; + } + msg_frag = 0; + frag_i = 0; + while (frag_i < size) { + msg_frag |= ((uint32_t)msg[index++]) << (frag_i * 8); + ++frag_i; + } + qtest_writel(qts, reg, msg_frag); + } +} + +static void fill_block(QTestState *qts, uint64_t reg, int count) +{ + while (--count >= 0) { + qtest_writel(qts, reg, 0); + } +} + +void sdhci_cmd_regs(QTestState *qts, uint64_t base_addr, uint16_t blksize, + uint16_t blkcnt, uint32_t argument, uint16_t trnmod, + uint16_t cmdreg) +{ + qtest_writew(qts, base_addr + SDHC_BLKSIZE, blksize); + qtest_writew(qts, base_addr + SDHC_BLKCNT, blkcnt); + qtest_writel(qts, base_addr + SDHC_ARGUMENT, argument); + qtest_writew(qts, base_addr + SDHC_TRNMOD, trnmod); + qtest_writew(qts, base_addr + SDHC_CMDREG, cmdreg); +} + +ssize_t sdhci_read_cmd(QTestState *qts, uint64_t base_addr, char *msg, + size_t count) +{ + sdhci_cmd_regs(qts, base_addr, count, 1, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_READ | SDHC_TRNS_BLK_CNT_EN, + SDHC_READ_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); + + /* read sd fifo_buffer */ + ssize_t bytes_read = read_fifo(qts, base_addr + SDHC_BDATA, msg, count); + + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_READ | SDHC_TRNS_BLK_CNT_EN, + SDHC_STOP_TRANSMISSION); + + return bytes_read; +} + +void sdhci_write_cmd(QTestState *qts, uint64_t base_addr, const char *msg, + size_t count, size_t blksize) +{ + sdhci_cmd_regs(qts, base_addr, blksize, 1, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | SDHC_TRNS_BLK_CNT_EN, + SDHC_WRITE_MULTIPLE_BLOCK | SDHC_CMD_DATA_PRESENT); + + /* write to sd fifo_buffer */ + write_fifo(qts, base_addr + SDHC_BDATA, msg, count); + fill_block(qts, base_addr + SDHC_BDATA, (blksize - count) / 4); + + sdhci_cmd_regs(qts, base_addr, 0, 0, 0, + SDHC_TRNS_MULTI | SDHC_TRNS_WRITE | SDHC_TRNS_BLK_CNT_EN, + SDHC_STOP_TRANSMISSION); +} diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build index 1f5c8f1053..4af1f04787 100644 --- a/tests/qtest/libqos/meson.build +++ b/tests/qtest/libqos/meson.build @@ -5,6 +5,7 @@ libqos_srcs = files('../libqtest.c', 'fw_cfg.c', 'malloc.c', 'libqos.c', + 'sdhci-cmd.c', # spapr 'malloc-spapr.c', -- 2.25.1 </blockquote></div>

[PULL,v2,04/12] tests/qtest/libqos: add SDHCI commands

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