Message ID | 20211016181514.3165661-1-richard.henderson@linaro.org |
---|---|
Headers | show |
Series | tcg patch queue | expand |
On 10/16/21 11:14 AM, Richard Henderson wrote: > The following changes since commit 6587b0c1331d427b0939c37e763842550ed581db: > > Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-10-15' into staging (2021-10-15 14:16:28 -0700) > > are available in the Git repository at: > > https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20211016 > > for you to fetch changes up to 995b87dedc78b0467f5f18bbc3546072ba97516a: > > Revert "cpu: Move cpu_common_props to hw/core/cpu.c" (2021-10-15 16:39:15 -0700) > > ---------------------------------------------------------------- > Move gdb singlestep to generic code > Fix cpu_common_props > > ---------------------------------------------------------------- > Richard Henderson (24): > accel/tcg: Handle gdb singlestep in cpu_tb_exec > target/alpha: Drop checks for singlestep_enabled > target/avr: Drop checks for singlestep_enabled > target/cris: Drop checks for singlestep_enabled > target/hexagon: Drop checks for singlestep_enabled > target/arm: Drop checks for singlestep_enabled > target/hppa: Drop checks for singlestep_enabled > target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt > target/i386: Drop check for singlestep_enabled > target/m68k: Drop checks for singlestep_enabled > target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP > target/microblaze: Drop checks for singlestep_enabled > target/mips: Fix single stepping > target/mips: Drop exit checks for singlestep_enabled > target/openrisc: Drop checks for singlestep_enabled > target/ppc: Drop exit checks for singlestep_enabled > target/riscv: Remove dead code after exception > target/riscv: Remove exit_tb and lookup_and_goto_ptr > target/rx: Drop checks for singlestep_enabled > target/s390x: Drop check for singlestep_enabled > target/sh4: Drop check for singlestep_enabled > target/tricore: Drop check for singlestep_enabled > target/xtensa: Drop check for singlestep_enabled > Revert "cpu: Move cpu_common_props to hw/core/cpu.c" > > include/hw/core/cpu.h | 1 + > target/i386/helper.h | 1 - > target/rx/helper.h | 1 - > target/sh4/helper.h | 1 - > target/tricore/helper.h | 1 - > accel/tcg/cpu-exec.c | 11 ++++ > cpu.c | 21 ++++++++ > hw/core/cpu-common.c | 17 +----- > target/alpha/translate.c | 13 ++--- > target/arm/translate-a64.c | 10 +--- > target/arm/translate.c | 36 +++---------- > target/avr/translate.c | 19 ++----- > target/cris/translate.c | 16 ------ > target/hexagon/translate.c | 12 +---- > target/hppa/translate.c | 17 ++---- > target/i386/tcg/misc_helper.c | 8 --- > target/i386/tcg/translate.c | 9 ++-- > target/m68k/translate.c | 44 ++++----------- > target/microblaze/translate.c | 18 ++----- > target/mips/tcg/translate.c | 75 ++++++++++++-------------- > target/openrisc/translate.c | 18 ++----- > target/ppc/translate.c | 38 +++---------- > target/riscv/translate.c | 27 +--------- > target/rx/op_helper.c | 8 --- > target/rx/translate.c | 12 +---- > target/s390x/tcg/translate.c | 8 +-- > target/sh4/op_helper.c | 5 -- > target/sh4/translate.c | 14 ++--- > target/tricore/op_helper.c | 7 --- > target/tricore/translate.c | 14 +---- > target/xtensa/translate.c | 25 +++------ > target/riscv/insn_trans/trans_privileged.c.inc | 10 ++-- > target/riscv/insn_trans/trans_rvi.c.inc | 8 ++- > target/riscv/insn_trans/trans_rvv.c.inc | 2 +- > 34 files changed, 141 insertions(+), 386 deletions(-) Applied, thanks. r~