diff mbox series

[net-next] net: dsa: tag_rtl4_a: Drop bit 9 from egress frames

Message ID 20210913143156.1264570-1-linus.walleij@linaro.org
State New
Headers show
Series [net-next] net: dsa: tag_rtl4_a: Drop bit 9 from egress frames | expand

Commit Message

Linus Walleij Sept. 13, 2021, 2:31 p.m. UTC 
This drops the code setting bit 9 on egress frames on the
Realtek "type A" (RTL8366RB) frames.

This bit was set on ingress frames for unknown reason,
and was set on egress frames as the format of ingress
and egress frames was believed to be the same. As that
assumption turned out to be false, and since this bit
seems to have zero effect on the behaviour of the switch
let's drop this bit entirely.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

---
 net/dsa/tag_rtl4_a.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.31.1

Comments

Andrew Lunn Sept. 13, 2021, 4:05 p.m. UTC | #1 
On Mon, Sep 13, 2021 at 04:31:56PM +0200, Linus Walleij wrote:
> This drops the code setting bit 9 on egress frames on the

> Realtek "type A" (RTL8366RB) frames.

> 

> This bit was set on ingress frames for unknown reason,

> and was set on egress frames as the format of ingress

> and egress frames was believed to be the same. As that

> assumption turned out to be false, and since this bit

> seems to have zero effect on the behaviour of the switch

> let's drop this bit entirely.

> 

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


Reviewed-by: Andrew Lunn <andrew@lunn.ch>


    Andrew
Florian Fainelli Sept. 13, 2021, 4:06 p.m. UTC | #2 
On 9/13/2021 7:31 AM, Linus Walleij wrote:
> This drops the code setting bit 9 on egress frames on the

> Realtek "type A" (RTL8366RB) frames.

> 

> This bit was set on ingress frames for unknown reason,

> and was set on egress frames as the format of ingress

> and egress frames was believed to be the same. As that

> assumption turned out to be false, and since this bit

> seems to have zero effect on the behaviour of the switch

> let's drop this bit entirely.

> 

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>

-- 
Florian
patchwork-bot+netdevbpf@kernel.org Sept. 15, 2021, 3:10 a.m. UTC | #3 
Hello:

This patch was applied to netdev/net-next.git (refs/heads/master):

On Mon, 13 Sep 2021 16:31:56 +0200 you wrote:
> This drops the code setting bit 9 on egress frames on the

> Realtek "type A" (RTL8366RB) frames.

> 

> This bit was set on ingress frames for unknown reason,

> and was set on egress frames as the format of ingress

> and egress frames was believed to be the same. As that

> assumption turned out to be false, and since this bit

> seems to have zero effect on the behaviour of the switch

> let's drop this bit entirely.

> 

> [...]


Here is the summary with links:
  - [net-next] net: dsa: tag_rtl4_a: Drop bit 9 from egress frames
    https://git.kernel.org/netdev/net-next/c/339133f6c318

You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
Qingfang Deng Sept. 15, 2021, 7:19 a.m. UTC | #4 
On Mon, Sep 13, 2021 at 04:31:56PM +0200, Linus Walleij wrote:
> This drops the code setting bit 9 on egress frames on the

> Realtek "type A" (RTL8366RB) frames.


FYI, on RTL8366S, bit 9 on egress frames is disable learning.

> This bit was set on ingress frames for unknown reason,


I think it could be the reason why the frame is forwarded to the CPU.

> and was set on egress frames as the format of ingress

> and egress frames was believed to be the same. As that

> assumption turned out to be false, and since this bit

> seems to have zero effect on the behaviour of the switch

> let's drop this bit entirely.

> 

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij Sept. 23, 2021, 9:59 p.m. UTC | #5 
On Wed, Sep 15, 2021 at 9:20 AM DENG Qingfang <dqfext@gmail.com> wrote:
> On Mon, Sep 13, 2021 at 04:31:56PM +0200, Linus Walleij wrote:


> > This drops the code setting bit 9 on egress frames on the

> > Realtek "type A" (RTL8366RB) frames.

>

> FYI, on RTL8366S, bit 9 on egress frames is disable learning.

>

> > This bit was set on ingress frames for unknown reason,

>

> I think it could be the reason why the frame is forwarded to the CPU.


Hm I suspect it disable learning on RTL8366RB as well.
Do we have some use for that feature in DSA taggers?

Yours,
Linus Walleij
Vladimir Oltean Sept. 23, 2021, 10:12 p.m. UTC | #6 
On Thu, Sep 23, 2021 at 11:59:36PM +0200, Linus Walleij wrote:
> On Wed, Sep 15, 2021 at 9:20 AM DENG Qingfang <dqfext@gmail.com> wrote:

> > On Mon, Sep 13, 2021 at 04:31:56PM +0200, Linus Walleij wrote:

> 

> > > This drops the code setting bit 9 on egress frames on the

> > > Realtek "type A" (RTL8366RB) frames.

> >

> > FYI, on RTL8366S, bit 9 on egress frames is disable learning.

> >

> > > This bit was set on ingress frames for unknown reason,

> >

> > I think it could be the reason why the frame is forwarded to the CPU.

> 

> Hm I suspect it disable learning on RTL8366RB as well.


Suspicion based on what?

> Do we have some use for that feature in DSA taggers?


Yes.
Linus Walleij Sept. 23, 2021, 10:21 p.m. UTC | #7 
On Fri, Sep 24, 2021 at 12:12 AM Vladimir Oltean <olteanv@gmail.com> wrote:

> > Hm I suspect it disable learning on RTL8366RB as well.

>

> Suspicion based on what?


I have a not yet finished patch that dumps the FDB :)

The contents change around a bit under the patch
sets I have floating, but can certainly be determined
when I have time to test things properly.

> > Do we have some use for that feature in DSA taggers?

>

> Yes.


OK I'll add it to my TODO, right now trying to fix up the base
of the RTL8366RB patch set to handle VLANs the right way.

Yours,
Linus Walleij
Vladimir Oltean Sept. 23, 2021, 10:25 p.m. UTC | #8 
On Fri, Sep 24, 2021 at 12:21:39AM +0200, Linus Walleij wrote:
> On Fri, Sep 24, 2021 at 12:12 AM Vladimir Oltean <olteanv@gmail.com> wrote:

> 

> > > Hm I suspect it disable learning on RTL8366RB as well.

> >

> > Suspicion based on what?

> 

> I have a not yet finished patch that dumps the FDB :)

> 

> The contents change around a bit under the patch

> sets I have floating, but can certainly be determined

> when I have time to test things properly.


To be clear, if bit 9 is a "disable learning" bit, address learning is a
process that takes place on the ingress of a packet, and in this case
the ingress port is the CPU port. But the ndo_fdb_dump works with net
devices, of which CPU ports have none. So it seems unlikely that you
would see any difference in the output of "bridge fdb" that could be
attributed to that bit.

> > > Do we have some use for that feature in DSA taggers?

> >

> > Yes.

> 

> OK I'll add it to my TODO, right now trying to fix up the base

> of the RTL8366RB patch set to handle VLANs the right way.


But you didn't ask what that use is...
Linus Walleij Sept. 23, 2021, 10:58 p.m. UTC | #9 
On Fri, Sep 24, 2021 at 12:25 AM Vladimir Oltean <olteanv@gmail.com> wrote:
> On Fri, Sep 24, 2021 at 12:21:39AM +0200, Linus Walleij wrote:


> > > > Do we have some use for that feature in DSA taggers?

> > >

> > > Yes.

> >

> > OK I'll add it to my TODO, right now trying to fix up the base

> > of the RTL8366RB patch set to handle VLANs the right way.

>

> But you didn't ask what that use is...


Allright spill the beans :D I might not be the most clever at times...

Yours,
Linus Walleij
Vladimir Oltean Sept. 23, 2021, 11:11 p.m. UTC | #10 
On Fri, Sep 24, 2021 at 12:58:00AM +0200, Linus Walleij wrote:
> On Fri, Sep 24, 2021 at 12:25 AM Vladimir Oltean <olteanv@gmail.com> wrote:

> > On Fri, Sep 24, 2021 at 12:21:39AM +0200, Linus Walleij wrote:

> > > > > Do we have some use for that feature in DSA taggers?

> > > >

> > > > Yes.

> > >

> > > OK I'll add it to my TODO, right now trying to fix up the base

> > > of the RTL8366RB patch set to handle VLANs the right way.

> >

> > But you didn't ask what that use is...

> 

> Allright spill the beans :D I might not be the most clever at times...


So the essence of the answer is in the discussion we've already had on
your v1 attempt to disable this "unknown" bit:
https://patchwork.kernel.org/project/netdevbpf/patch/20210828235619.249757-1-linus.walleij@linaro.org/

The idea is that bridges should learn only from data plane packets, and
the only chance a DSA tagger has to distinguish between a data and a
control packet sent by the network stack is to look at
skb->offload_fwd_mark, which will be set on xmit by the bridge driver,
if you implement the .port_bridge_tx_fwd_offload and .port_bridge_tx_fwd_unoffload
methods, and declare a non-zero ds->max_num_bridges value (note: the API
for bridge TX forwarding offload in DSA is subject to change/get
simplified during this development cycle). And to offload the replication
for data packets correctly, you should really re-read the discussion we
had about what happens when the egress port mask set by the tagger is all-zeroes.

Not to blow my own horn or anything, but I've repeated this stuff for so many
times now that I wrote it down for future reference, you can find the basic
concepts detailed in chapter "The data plane and the control plane" from the
paper attached here (there are also pictures, not sure how much they help):
https://linuxplumbersconf.org/event/11/contributions/949/
diff mbox series

Patch

diff --git a/net/dsa/tag_rtl4_a.c b/net/dsa/tag_rtl4_a.c
index f920487ae145..6d928ee3ef7a 100644
--- a/net/dsa/tag_rtl4_a.c
+++ b/net/dsa/tag_rtl4_a.c
@@ -54,7 +54,7 @@  static struct sk_buff *rtl4a_tag_xmit(struct sk_buff *skb,
 	p = (__be16 *)tag;
 	*p = htons(RTL4_A_ETHERTYPE);
 
-	out = (RTL4_A_PROTOCOL_RTL8366RB << RTL4_A_PROTOCOL_SHIFT) | (2 << 8);
+	out = (RTL4_A_PROTOCOL_RTL8366RB << RTL4_A_PROTOCOL_SHIFT);
 	/* The lower bits indicate the port number */
 	out |= BIT(dp->index);