| Message ID | 1628619089-12502-1-git-send-email-pillair@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] arm64: dts: qcom: sc7280: Add WPSS remoteproc node | expand |
> -----Original Message----- > From: Stephen Boyd <swboyd@chromium.org> > Sent: Wednesday, August 11, 2021 1:22 AM > To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org; > bjorn.andersson@linaro.org; robh+dt@kernel.org > Cc: linux-arm-msm@vger.kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; sibis@codeaurora.org; mpubbise@codeaurora.org > Subject: Re: [PATCH v2] arm64: dts: qcom: sc7280: Add WPSS remoteproc > node > > Quoting Rakesh Pillai (2021-08-10 11:11:29) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > index 53a21d0..41a7826 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > @@ -74,6 +74,16 @@ > > reg = <0 0x8b700000 0 0x10000>; > > no-map; > > }; > > + > > + wlan_fw_mem: memory@80c00000 { > > + no-map; > > + reg = <0x0 0x80c00000 0x0 0xc00000>; > > + }; > > Please try to keep this sorted by reg address. 80c00000 comes before > 8b700000. > Hi Stephen, I will fix this and send v3 for this patch. > > + > > + wpss_mem: memory@9ae00000 { > > + no-map; > > + reg = <0x0 0x9ae00000 0x0 0x1900000>; > > + }; > > }; > > > > cpus { > > @@ -1270,6 +1280,53 @@ > > }; > > }; > > > > + remoteproc_wpss: remoteproc@8a00000 { > > + compatible = "qcom,sc7280-wpss-pil"; > > + reg = <0 0x08a00000 0 0x10000>; > > + > > + interrupts-extended = <&intc GIC_SPI 587 > IRQ_TYPE_EDGE_RISING>, > > + <&wpss_smp2p_in 0 IRQ_TYPE_NONE>, > > + <&wpss_smp2p_in 1 IRQ_TYPE_NONE>, > > + <&wpss_smp2p_in 2 IRQ_TYPE_NONE>, > > + <&wpss_smp2p_in 3 IRQ_TYPE_NONE>, > > + <&wpss_smp2p_in 7 > > + IRQ_TYPE_NONE>; > > Is this IRQ_TYPE_EDGE_RISING? Please add some type of edge or level flag. I will change it to IRQ_TYPE_EDGE_RISING and send out the next revision. > > > + interrupt-names = "wdog", "fatal", "ready", "handover", > > + "stop-ack", "shutdown-ack"; > > + > > + clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>, > > + <&gcc GCC_WPSS_AHB_CLK>, > > + <&gcc GCC_WPSS_RSCP_CLK>, > > + <&rpmhcc RPMH_CXO_CLK>; > > + clock-names = "gcc_wpss_ahb_bdg_mst_clk", > > + "gcc_wpss_ahb_clk", > > + "gcc_wpss_rscp_clk", > > + "xo"; > > + > > + memory-region = <&wpss_mem>; > > + > > + qcom,smem-states = <&wpss_smp2p_out 0>;
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts index 64fc22a..2b8bbcd 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts @@ -68,3 +68,7 @@ qcom,pre-scaling = <1 1>; }; }; + +&remoteproc_wpss { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 53a21d0..41a7826 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -74,6 +74,16 @@ reg = <0 0x8b700000 0 0x10000>; no-map; }; + + wlan_fw_mem: memory@80c00000 { + no-map; + reg = <0x0 0x80c00000 0x0 0xc00000>; + }; + + wpss_mem: memory@9ae00000 { + no-map; + reg = <0x0 0x9ae00000 0x0 0x1900000>; + }; }; cpus { @@ -1270,6 +1280,53 @@ }; }; + remoteproc_wpss: remoteproc@8a00000 { + compatible = "qcom,sc7280-wpss-pil"; + reg = <0 0x08a00000 0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>, + <&wpss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 3 IRQ_TYPE_NONE>, + <&wpss_smp2p_in 7 IRQ_TYPE_NONE>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>, + <&gcc GCC_WPSS_AHB_CLK>, + <&gcc GCC_WPSS_RSCP_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "gcc_wpss_ahb_bdg_mst_clk", + "gcc_wpss_ahb_clk", + "gcc_wpss_rscp_clk", + "xo"; + + memory-region = <&wpss_mem>; + + qcom,smem-states = <&wpss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + resets = <&aoss_reset AOSS_CC_WCSS_RESTART>, + <&pdc_reset PDC_WPSS_SYNC_RESET>; + reset-names = "restart", "pdc_sync"; + + qcom,halt-regs = <&tcsr_mutex_regs 0x37000>; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_WPSS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_WPSS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "wpss"; + qcom,remote-pid = <13>; + }; + }; + usb_2: usb@8cf8800 { compatible = "qcom,sc7280-dwc3", "qcom,dwc3"; reg = <0 0x08cf8800 0 0x400>;
Add the WPSS remoteproc node in dts for PIL loading. Signed-off-by: Rakesh Pillai <pillair@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280-idp.dts | 4 +++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 57 +++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+)