diff mbox series

usb: dwc3: core: balance phy init and exit

Message ID 1631068099-13559-1-git-send-email-jun.li@nxp.com
State New
Headers show
Series usb: dwc3: core: balance phy init and exit | expand

Commit Message

Jun Li Sept. 8, 2021, 2:28 a.m. UTC
After we start to do core soft reset while usb role switch,
the phy init is invoked at every switch to device mode, but
its counter part de-init is missing, this causes the actual
phy init can not be done when we really want to re-init phy
like system resume, because the counter maintained by phy
core is not 0. considering phy init is actually redundant for
role switch, so move out the phy init from core soft reset to
dwc3 core init where is the only place required.

Fixes: f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")
Cc: <stable@vger.kernel.org>
Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
---
 drivers/usb/dwc3/core.c | 30 +++++++++++++-----------------
 1 file changed, 13 insertions(+), 17 deletions(-)

Comments

John Stultz Sept. 9, 2021, 2:08 a.m. UTC | #1
On Tue, Sep 7, 2021 at 7:51 PM Li Jun <jun.li@nxp.com> wrote:
>

> After we start to do core soft reset while usb role switch,

> the phy init is invoked at every switch to device mode, but

> its counter part de-init is missing, this causes the actual

> phy init can not be done when we really want to re-init phy

> like system resume, because the counter maintained by phy

> core is not 0. considering phy init is actually redundant for

> role switch, so move out the phy init from core soft reset to

> dwc3 core init where is the only place required.

>

> Fixes: f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")

> Cc: <stable@vger.kernel.org>

> Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>

> Signed-off-by: Li Jun <jun.li@nxp.com>


Tested-by: John Stultz <john.stultz@linaro.org> #HiKey960


thanks!
-john
Felipe Balbi Sept. 9, 2021, 5:12 a.m. UTC | #2
Hi,

Li Jun <jun.li@nxp.com> writes:

> After we start to do core soft reset while usb role switch,

> the phy init is invoked at every switch to device mode, but

> its counter part de-init is missing, this causes the actual

> phy init can not be done when we really want to re-init phy

> like system resume, because the counter maintained by phy

> core is not 0. considering phy init is actually redundant for

> role switch, so move out the phy init from core soft reset to

> dwc3 core init where is the only place required.

>

> Fixes: f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")

> Cc: <stable@vger.kernel.org>

> Tested-by: faqiang.zhu <faqiang.zhu@nxp.com>

> Signed-off-by: Li Jun <jun.li@nxp.com>


we need a few more Tested-bys, but patch looks good:

Acked-by: Felipe Balbi <balbi@kernel.org>


-- 
balbi
diff mbox series

Patch

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 4483275afb8a..a02229517d2f 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -264,19 +264,6 @@  static int dwc3_core_soft_reset(struct dwc3 *dwc)
 {
 	u32		reg;
 	int		retries = 1000;
-	int		ret;
-
-	usb_phy_init(dwc->usb2_phy);
-	usb_phy_init(dwc->usb3_phy);
-	ret = phy_init(dwc->usb2_generic_phy);
-	if (ret < 0)
-		return ret;
-
-	ret = phy_init(dwc->usb3_generic_phy);
-	if (ret < 0) {
-		phy_exit(dwc->usb2_generic_phy);
-		return ret;
-	}
 
 	/*
 	 * We're resetting only the device side because, if we're in host mode,
@@ -310,9 +297,6 @@  static int dwc3_core_soft_reset(struct dwc3 *dwc)
 			udelay(1);
 	} while (--retries);
 
-	phy_exit(dwc->usb3_generic_phy);
-	phy_exit(dwc->usb2_generic_phy);
-
 	return -ETIMEDOUT;
 
 done:
@@ -1010,9 +994,21 @@  static int dwc3_core_init(struct dwc3 *dwc)
 		dwc->phys_ready = true;
 	}
 
+	usb_phy_init(dwc->usb2_phy);
+	usb_phy_init(dwc->usb3_phy);
+	ret = phy_init(dwc->usb2_generic_phy);
+	if (ret < 0)
+		goto err0a;
+
+	ret = phy_init(dwc->usb3_generic_phy);
+	if (ret < 0) {
+		phy_exit(dwc->usb2_generic_phy);
+		goto err0a;
+	}
+
 	ret = dwc3_core_soft_reset(dwc);
 	if (ret)
-		goto err0a;
+		goto err1;
 
 	if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD &&
 	    !DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) {