| Message ID | 20210824100027.25989-4-moudy.ho@mediatek.com |
|---|---|
| State | New |
| Headers | show |
| Series | media: mediatek: support mdp3 on mt8183 platform | expand |
On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > This patch adds DT binding document for Media Data Path 3 (MDP3) > > a unit in multimedia system used for scaling and color format > > convert. > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > --- > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > ++++++++++++++++++ > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > 5 files changed, 471 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml > > new file mode 100644 > > index 000000000000..59fd68b46022 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml > > @@ -0,0 +1,57 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > + > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > + > > +maintainers: > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > + - Moudy Ho <moudy.ho@mediatek.com> > > + > > +description: | > > + One of Media Data Path 3 (MDP3) components used to do color > > correction with 3X3 matrix. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,mt8183-mdp3-ccorr > > + > > + mediatek,mdp3-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + maxItems: 1 > > + description: | > > + HW index to distinguish same functionality modules. > > If we wanted h/w indexes in DT, we'd have a standard property. Why > do > you need this? > I'm sorry not quite sure what HW indexes means (something like aliases?) It was originally used to mark multiple identical modules in the MDP data path algorithm, so that appropriate paths can be dynamically dispatched. > > + > > + reg: > > + description: | > > + Physical base address and length of the function block > > + register space, the number aligns with the component > > + and its own subcomponent. > > Drop and add 'maxItems: 1' > > > + > > + mediatek,gce-client-reg: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: | > > + sub-system id corresponding to the global command engine > > (GCE) > > You mean 'phandle to GCE and sub-system id'? Yes. > > > + register address. > > + $ref: /schemas/mailbox/mtk-gce.txt > > Kind of looks like jsonschema but in the description and to a .txt > file... > > > + > > + clocks: > > + minItems: 1 > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/mt8183-clk.h> > > + #include <dt-bindings/gce/mt8183-gce.h> > > + > > + mdp3_ccorr: mdp3_ccorr@1401c000 { > > + compatible = "mediatek,mt8183-mdp3-ccorr"; > > + mediatek,mdp3-id = <0>; > > + reg = <0x1401c000 0x1000>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 > > 0x1000>; > > + clocks = <&mmsys CLK_MM_MDP_CCORR>; > > + }; > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > rdma.yaml > > new file mode 100644 > > index 000000000000..b355d7fe791e > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > rdma.yaml > > @@ -0,0 +1,207 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajips2k1HT2$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > + > > +title: Mediatek Media Data Path 3 Device Tree Bindings > > + > > +maintainers: > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > + - Moudy Ho <moudy.ho@mediatek.com> > > + > > +description: | > > + One of Media Data Path 3 (MDP3) components used to do read DMA. > > + RDMA0 is also used to be a controller node containing MMSYS, > > + MUTEX, GCE and SCP settings. > > + > > +properties: > > + compatible: > > + oneOf: > > + - items: > > + - enum: > > Should be indented 2 more spaces. Install yamllint and check with > 'make > dt_binding_check'. > > > + # controller node > > + - mediatek,mt8183-mdp3 > > And then 2 more here. > > > + - enum: > > + - mediatek,mt8183-mdp3-rdma > > + > > + - items: > > + - enum: > > + # read DMA > > + - mediatek,mt8183-mdp3-rdma > > + > > + mediatek,scp: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: | > > + The node of system control processor (SCP), using > > + the remoteproc & rpmsg framework. > > + $ref: /schemas/remoteproc/mtk,scp.yaml > > + > > + mediatek,mdp3-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + maxItems: 1 > > + description: | > > + In MDP3, it can allocate multiple identical modules for > > + different data path selection or multi-pipeline execution. > > + This node is used to indicate the ID of each module. > > + > > + mdp3-comps: > > + $ref: /schemas/types.yaml#/definitions/string-array > > + items: > > + - enum: > > And this is 2 too many spaces... > > > + # MDP direct-link input path selection, create a > > + # component for path connectedness of HW pipe control > > + - mediatek,mt8183-mdp3-dl1 > > + - enum: > > + - mediatek,mt8183-mdp3-dl2 > > + - enum: > > + # MDP direct-link output path selection, create a > > + # component for path connectedness of HW pipe control > > + - mediatek,mt8183-mdp3-path1 > > + - enum: > > + - mediatek,mt8183-mdp3-path2 > > + - enum: > > + # Input DMA of ISP PASS2 (DIP) module for raw image > > input > > + - mediatek,mt8183-mdp3-imgi > > + - enum: > > + # Output DMA of ISP PASS2 (DIP) module for YUV image > > output > > + - mediatek,mt8183-mdp3-exto > > + > > + mdp3-comp-ids: > > + maxItems: 1 > > + $ref: /schemas/types.yaml#/definitions/uint32-array > > If only a single item, then it's a 'uint32' not an array. Only one in other module, but multiple in RDMA0 for subcomponents. > > > + description: | > > + Pipeline ID of MDP direct-link or DIP. > > + > > + reg: > > + description: | > > + Physical base address and length of the function block > > + register space, the number aligns with the component > > + and its own subcomponent. > > + > > + mediatek,gce-client-reg: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: | > > + sub-system id corresponding to the global command engine > > (GCE) > > + register address. > > + $ref: /schemas/mailbox/mtk-gce.txt > > + > > + power-domains: > > + maxItems: 1 > > + > > + clocks: > > + minItems: 1 > > + maxItems: 6 > > Need to define what they are. > > > + > > + iommus: > > + $ref: /schemas/types.yaml#/definitions/phandle > > iommus already has a type definition. > > > + description: | > > + Should point to the respective IOMMU block with master > > + port as argument. > > + $ref: /schemas/iommu/mediatek,iommu.yaml > > No. Drop (the whole description because you don't need generic > descriptions for common properties). > > What's needed is how many entries (maxItems: 1). > > > + > > + mediatek,mmsys: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: | > > + The node of mux(multiplexer) controller for HW connections. > > + > > + mediatek,mm-mutex: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + maxItems: 1 > > + description: | > > + The node of sof(start of frame) signal controller. > > + > > + mediatek,mailbox-gce: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: | > > + The node of global command engine (GCE), used to read/write > > + registers with critical time limitation. > > + $ref: /schemas/mailbox/mtk-gce.txt > > + > > + mboxes: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: | > > + $ref: /schemas/mailbox/mailbox.txt > > + > > + gce-subsys: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: | > > + sub-system id corresponding to the global command engine > > (GCE) > > + register address. > > + $ref: /schemas/mailbox/mtk-gce.txt > > + > > +if: > > + properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,mt8183-mdp3 > > + - enum: > > + - mediatek,mt8183-mdp3-rdma > > Normally, you want to use 'contains' for if/then schemas: > > compatible: > contains: > const: mediatek,mt8183-mdp3 > > > + > > +then: > > + required: > > + - mediatek,scp > > + - mediatek,mmsys > > + - mediatek,mm-mutex > > + - mediatek,mailbox-gce > > + - mboxes > > + - gce-subsys > > + > > +required: > > + - compatible > > + - mediatek,mdp3-id > > + - reg > > + - clocks > > + - mediatek,gce-client-reg > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/mt8183-clk.h> > > + #include <dt-bindings/gce/mt8183-gce.h> > > + #include <dt-bindings/power/mt8183-power.h> > > + #include <dt-bindings/memory/mt8183-larb-port.h> > > + > > + mdp3_rdma0: mdp3_rdma0@14001000 { > > + compatible = "mediatek,mt8183-mdp3", > > + "mediatek,mt8183-mdp3-rdma"; > > + mediatek,scp = <&scp>; > > + mediatek,mdp3-id = <0>; > > + mdp3-comps = "mediatek,mt8183-mdp3-dl1", "mediatek,mt8183- > > mdp3-dl2", > > + "mediatek,mt8183-mdp3-path1", "mediatek,mt8183- > > mdp3-path2", > > + "mediatek,mt8183-mdp3-imgi", "mediatek,mt8183- > > mdp3-exto"; > > + mdp3-comp-ids = <0 1 0 1 0 1>; > > + reg = <0x14001000 0x1000>, > > + <0x14000000 0x1000>, > > + <0x14005000 0x1000>, > > + <0x14006000 0x1000>, > > + <0x15020000 0x1000>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 > > 0x1000>, > > + <&gce SUBSYS_1400XXXX 0 0x1000>, > > + <&gce SUBSYS_1400XXXX 0x5000 > > 0x1000>, > > + <&gce SUBSYS_1400XXXX 0x6000 > > 0x1000>, > > + <&gce SUBSYS_1502XXXX 0 0x1000>; > > + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; > > + clocks = <&mmsys CLK_MM_MDP_RDMA0>, > > + <&mmsys CLK_MM_MDP_RSZ1>, > > + <&mmsys CLK_MM_MDP_DL_TXCK>, > > + <&mmsys CLK_MM_MDP_DL_RX>, > > + <&mmsys CLK_MM_IPU_DL_TXCK>, > > + <&mmsys CLK_MM_IPU_DL_RX>; > > + iommus = <&iommu>; > > + mediatek,mmsys = <&mmsys>; > > + mediatek,mm-mutex = <&mutex>; > > + mediatek,mailbox-gce = <&gce>; > > + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, > > + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, > > + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, > > + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; > > + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, > > + <&gce 0x14010000 SUBSYS_1401XXXX>, > > + <&gce 0x14020000 SUBSYS_1402XXXX>, > > + <&gce 0x15020000 SUBSYS_1502XXXX>; > > + }; > > \ No newline at end of file > > Fix this. > > Similar comments on the rest. > > Rob Thanks for the suggestion, the remaining will be corrected in the further. Moudy Ho
On Mon, Aug 30, 2021 at 2:58 AM moudy ho <moudy.ho@mediatek.com> wrote: > > On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > > This patch adds DT binding document for Media Data Path 3 (MDP3) > > > a unit in multimedia system used for scaling and color format > > > convert. > > > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > > --- > > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > > ++++++++++++++++++ > > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > > 5 files changed, 471 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > > > create mode 100644 > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > > create mode 100644 > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > > create mode 100644 > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > > create mode 100644 > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > ccorr.yaml > > > new file mode 100644 > > > index 000000000000..59fd68b46022 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > ccorr.yaml > > > @@ -0,0 +1,57 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: > > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > > > +$schema: > > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > > > + > > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > > + > > > +maintainers: > > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > > + - Moudy Ho <moudy.ho@mediatek.com> > > > + > > > +description: | > > > + One of Media Data Path 3 (MDP3) components used to do color > > > correction with 3X3 matrix. > > > + > > > +properties: > > > + compatible: > > > + items: > > > + - enum: > > > + - mediatek,mt8183-mdp3-ccorr > > > + > > > + mediatek,mdp3-id: > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > + maxItems: 1 > > > + description: | > > > + HW index to distinguish same functionality modules. > > > > If we wanted h/w indexes in DT, we'd have a standard property. Why > > do > > you need this? > > > I'm sorry not quite sure what HW indexes means (something like > aliases?) It means whatever you said in your description. And no, I'm not suggesting you use aliases. > It was originally used to mark multiple identical modules in the MDP > data path algorithm, so that appropriate paths can be dynamically > dispatched. If they are identical, then why do you need to distinguish them in DT? If there's some difference you need to know about such as connections to other blocks, then describe that. Another common example is needing to know what bits/registers to access in a syscon phandle. For that, make the register offset or bits be args to the phandle property. Rob
On Mon, 2021-08-30 at 10:05 -0500, Rob Herring wrote: > On Mon, Aug 30, 2021 at 2:58 AM moudy ho <moudy.ho@mediatek.com> > wrote: > > > > On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > > > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > > > This patch adds DT binding document for Media Data Path 3 > > > > (MDP3) > > > > a unit in multimedia system used for scaling and color format > > > > convert. > > > > > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > > > --- > > > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > > > ++++++++++++++++++ > > > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > > > 5 files changed, 471 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > new file mode 100644 > > > > index 000000000000..59fd68b46022 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > @@ -0,0 +1,57 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: > > > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > > > > > +$schema: > > > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > > > > > + > > > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > > > + > > > > +maintainers: > > > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > > > + - Moudy Ho <moudy.ho@mediatek.com> > > > > + > > > > +description: | > > > > + One of Media Data Path 3 (MDP3) components used to do color > > > > correction with 3X3 matrix. > > > > + > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - enum: > > > > + - mediatek,mt8183-mdp3-ccorr > > > > + > > > > + mediatek,mdp3-id: > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > + maxItems: 1 > > > > + description: | > > > > + HW index to distinguish same functionality modules. > > > > > > If we wanted h/w indexes in DT, we'd have a standard property. > > > Why > > > do > > > you need this? > > > > > > > I'm sorry not quite sure what HW indexes means (something like > > aliases?) > > It means whatever you said in your description. > > And no, I'm not suggesting you use aliases. Sorry for the inaccuracy described here, the comment i mentioned before should be "standard property" instead of "HW index". > > It was originally used to mark multiple identical modules in the > > MDP > > data path algorithm, so that appropriate paths can be dynamically > > dispatched. > > If they are identical, then why do you need to distinguish them in > DT? > If there's some difference you need to know about such as connections > to other blocks, then describe that. Another common example is > needing > to know what bits/registers to access in a syscon phandle. For that, > make the register offset or bits be args to the phandle property. > > Rob Integrating the previous discussion, maybe I can revise the description to the following: description: | There may be multiple blocks with the same function but different addresses in MDP3. In order to distinguish the connection with other blocks, a unique ID is needed to dynamically use one or more identical blocks to implement multiple pipelines. Moudy
On Wed, Sep 1, 2021 at 5:04 PM moudy ho <moudy.ho@mediatek.com> wrote: > > On Mon, 2021-08-30 at 10:05 -0500, Rob Herring wrote: > > On Mon, Aug 30, 2021 at 2:58 AM moudy ho <moudy.ho@mediatek.com> > > wrote: > > > > > > On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > > > > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > > > > This patch adds DT binding document for Media Data Path 3 > > > > > (MDP3) > > > > > a unit in multimedia system used for scaling and color format > > > > > convert. > > > > > > > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > > > > --- > > > > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > > > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > > > > ++++++++++++++++++ > > > > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > > > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > > > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > > > > 5 files changed, 471 insertions(+) > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > ccorr.yaml > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > > > > create mode 100644 > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > > > > > > > diff --git > > > > > a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > ccorr.yaml > > > > > b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > ccorr.yaml > > > > > new file mode 100644 > > > > > index 000000000000..59fd68b46022 > > > > > --- /dev/null > > > > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > ccorr.yaml > > > > > @@ -0,0 +1,57 @@ > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > > +%YAML 1.2 > > > > > +--- > > > > > +$id: > > > > > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > > > > > > > +$schema: > > > > > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > > > > > > > + > > > > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > > > > + > > > > > +maintainers: > > > > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > > > > + - Moudy Ho <moudy.ho@mediatek.com> > > > > > + > > > > > +description: | > > > > > + One of Media Data Path 3 (MDP3) components used to do color > > > > > correction with 3X3 matrix. > > > > > + > > > > > +properties: > > > > > + compatible: > > > > > + items: > > > > > + - enum: > > > > > + - mediatek,mt8183-mdp3-ccorr > > > > > + > > > > > + mediatek,mdp3-id: > > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > > + maxItems: 1 > > > > > + description: | > > > > > + HW index to distinguish same functionality modules. > > > > > > > > If we wanted h/w indexes in DT, we'd have a standard property. > > > > Why > > > > do > > > > you need this? > > > > > > > > > > I'm sorry not quite sure what HW indexes means (something like > > > aliases?) > > > > It means whatever you said in your description. > > > > And no, I'm not suggesting you use aliases. > > Sorry for the inaccuracy described here, the comment i mentioned before > should be "standard property" instead of "HW index". > > > > It was originally used to mark multiple identical modules in the > > > MDP > > > data path algorithm, so that appropriate paths can be dynamically > > > dispatched. > > > > If they are identical, then why do you need to distinguish them in > > DT? > > If there's some difference you need to know about such as connections > > to other blocks, then describe that. Another common example is > > needing > > to know what bits/registers to access in a syscon phandle. For that, > > make the register offset or bits be args to the phandle property. > > > > Rob > > Integrating the previous discussion, maybe I can revise the description > to the following: > description: | > There may be multiple blocks with the same function but different > addresses in MDP3. In order to distinguish the connection with > other blocks, a unique ID is needed to dynamically use one or > more identical blocks to implement multiple pipelines. With display pipelines it is common to describe the pipeline with an OF graph. With the pipeline drawn out, you also get ways to derive identifiers for otherwise identical blocks, such as from port IDs. See Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml and arch/arm/boot/dts/sun9i-a80.dtsi for such an example. ChenYu
Hi, Rob: Rob Herring <robh@kernel.org> 於 2021年8月30日 週一 下午11:06寫道： > > On Mon, Aug 30, 2021 at 2:58 AM moudy ho <moudy.ho@mediatek.com> wrote: > > > > On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > > > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > > > This patch adds DT binding document for Media Data Path 3 (MDP3) > > > > a unit in multimedia system used for scaling and color format > > > > convert. > > > > > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > > > --- > > > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > > > ++++++++++++++++++ > > > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > > > 5 files changed, 471 insertions(+) > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > > > create mode 100644 > > > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > new file mode 100644 > > > > index 000000000000..59fd68b46022 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > ccorr.yaml > > > > @@ -0,0 +1,57 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: > > > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > > > > > +$schema: > > > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > > > > > + > > > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > > > + > > > > +maintainers: > > > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > > > + - Moudy Ho <moudy.ho@mediatek.com> > > > > + > > > > +description: | > > > > + One of Media Data Path 3 (MDP3) components used to do color > > > > correction with 3X3 matrix. > > > > + > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - enum: > > > > + - mediatek,mt8183-mdp3-ccorr > > > > + > > > > + mediatek,mdp3-id: > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > + maxItems: 1 > > > > + description: | > > > > + HW index to distinguish same functionality modules. > > > > > > If we wanted h/w indexes in DT, we'd have a standard property. Why > > > do > > > you need this? > > > > > I'm sorry not quite sure what HW indexes means (something like > > aliases?) > > It means whatever you said in your description. > > And no, I'm not suggesting you use aliases. Because mediatek drm driver has the same problem with mdp driver, and it has already use the aliases [1]. No matter what is the conclusion for mdp driver, I think mediatek drm driver should align to this conclusion. If the conclusion is to remove aliases, should I modify the dts which has already upstreamed? Should mediatek drm driver be backward-compatible with down stream dts which use aliases? [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/mediatek/mt8173.dtsi?h=v5.14 Regards, Chun-Kuang. > > > It was originally used to mark multiple identical modules in the MDP > > data path algorithm, so that appropriate paths can be dynamically > > dispatched. > > If they are identical, then why do you need to distinguish them in DT? > If there's some difference you need to know about such as connections > to other blocks, then describe that. Another common example is needing > to know what bits/registers to access in a syscon phandle. For that, > make the register offset or bits be args to the phandle property. > > Rob > > _______________________________________________ > Linux-mediatek mailing list > Linux-mediatek@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-mediatek
On Wed, 2021-09-01 at 18:16 +0800, Chen-Yu Tsai wrote: > On Wed, Sep 1, 2021 at 5:04 PM moudy ho <moudy.ho@mediatek.com> > wrote: > > > > On Mon, 2021-08-30 at 10:05 -0500, Rob Herring wrote: > > > On Mon, Aug 30, 2021 at 2:58 AM moudy ho <moudy.ho@mediatek.com> > > > wrote: > > > > > > > > On Tue, 2021-08-24 at 13:02 -0500, Rob Herring wrote: > > > > > On Tue, Aug 24, 2021 at 06:00:25PM +0800, Moudy Ho wrote: > > > > > > This patch adds DT binding document for Media Data Path 3 > > > > > > (MDP3) > > > > > > a unit in multimedia system used for scaling and color > > > > > > format > > > > > > convert. > > > > > > > > > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > > > > > --- > > > > > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > > > > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > > > > > ++++++++++++++++++ > > > > > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > > > > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > > > > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > > > > > 5 files changed, 471 insertions(+) > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > ccorr.yaml > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > rdma.yaml > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > rsz.yaml > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > wdma.yaml > > > > > > create mode 100644 > > > > > > Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > wrot.yaml > > > > > > > > > > > > diff --git > > > > > > a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > ccorr.yaml > > > > > > b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > ccorr.yaml > > > > > > new file mode 100644 > > > > > > index 000000000000..59fd68b46022 > > > > > > --- /dev/null > > > > > > +++ > > > > > > b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > > > > > ccorr.yaml > > > > > > @@ -0,0 +1,57 @@ > > > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > > > +%YAML 1.2 > > > > > > +--- > > > > > > +$id: > > > > > > > > > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipusfH8hi$ > > > > > > > > > > > > +$schema: > > > > > > > > > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1C0ChLqzi7Zq8D2d4_S4IqCEei4GXdgy3_VCQg8MdsJP7n8TlxbGyajipi-OInix$ > > > > > > > > > > > > + > > > > > > +title: Mediatek Media Data Path 3 CCORR Device Tree > > > > > > Bindings > > > > > > + > > > > > > +maintainers: > > > > > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > > > > > + - Moudy Ho <moudy.ho@mediatek.com> > > > > > > + > > > > > > +description: | > > > > > > + One of Media Data Path 3 (MDP3) components used to do > > > > > > color > > > > > > correction with 3X3 matrix. > > > > > > + > > > > > > +properties: > > > > > > + compatible: > > > > > > + items: > > > > > > + - enum: > > > > > > + - mediatek,mt8183-mdp3-ccorr > > > > > > + > > > > > > + mediatek,mdp3-id: > > > > > > + $ref: /schemas/types.yaml#/definitions/uint32 > > > > > > + maxItems: 1 > > > > > > + description: | > > > > > > + HW index to distinguish same functionality modules. > > > > > > > > > > If we wanted h/w indexes in DT, we'd have a standard > > > > > property. > > > > > Why > > > > > do > > > > > you need this? > > > > > > > > > > > > > I'm sorry not quite sure what HW indexes means (something like > > > > aliases?) > > > > > > It means whatever you said in your description. > > > > > > And no, I'm not suggesting you use aliases. > > > > Sorry for the inaccuracy described here, the comment i mentioned > > before > > should be "standard property" instead of "HW index". > > > > > > It was originally used to mark multiple identical modules in > > > > the > > > > MDP > > > > data path algorithm, so that appropriate paths can be > > > > dynamically > > > > dispatched. > > > > > > If they are identical, then why do you need to distinguish them > > > in > > > DT? > > > If there's some difference you need to know about such as > > > connections > > > to other blocks, then describe that. Another common example is > > > needing > > > to know what bits/registers to access in a syscon phandle. For > > > that, > > > make the register offset or bits be args to the phandle property. > > > > > > Rob > > > > Integrating the previous discussion, maybe I can revise the > > description > > to the following: > > description: | > > There may be multiple blocks with the same function but > > different > > addresses in MDP3. In order to distinguish the connection > > with > > other blocks, a unique ID is needed to dynamically use one or > > more identical blocks to implement multiple pipelines. > > With display pipelines it is common to describe the pipeline with an > OF > graph. With the pipeline drawn out, you also get ways to derive > identifiers > for otherwise identical blocks, such as from port IDs. > > See Documentation/devicetree/bindings/display/allwinner,sun4i-a10- > display-engine.yaml > and arch/arm/boot/dts/sun9i-a80.dtsi for such an example. > > > ChenYu From the MDP routing table defined in mt8183-mmsys.h ([v7,2/5] soc: mediatek: mmsys: Add support for MDP), It can be seen that each component has its own independent one-to-many mapping table, and its next-level receiver may have its own multiple inputs and is difficult to briefly describe these relationships. In addition, due to hardware limitations, RSZ0 (for example) cannot be completely regarded as RSZ1 in mmsys, and must be regarded as an independent entity, an example mentioned in line #67 from mtk-mdp3-cmdq.c ([v7,5/5] media: platform: mtk-mdp3: Add Mediatek MDP3 driver). Moudy
Hi, Moudy: Moudy Ho <moudy.ho@mediatek.com> 於 2021年8月24日 週二 下午6:02寫道： > > This patch adds DT binding document for Media Data Path 3 (MDP3) > a unit in multimedia system used for scaling and color format convert. > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > --- > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 ++++++++++++++++++ > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > 5 files changed, 471 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml I've compared ccorr driver in display [1] and ccorr in mdp [2], both are similar. So I would like both binding document are placed together. In display folder? In mdp folder? In SoC folder? I've no idea which one is better. At lease put together. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v5.14 [2] https://patchwork.kernel.org/project/linux-mediatek/patch/20210824100027.25989-6-moudy.ho@mediatek.com/ Regards, Chun-Kuang. > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > new file mode 100644 > index 000000000000..59fd68b46022 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > + > +maintainers: > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > + - Moudy Ho <moudy.ho@mediatek.com> > + > +description: | > + One of Media Data Path 3 (MDP3) components used to do color correction with 3X3 matrix. > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,mt8183-mdp3-ccorr > + > + mediatek,mdp3-id: > + $ref: /schemas/types.yaml#/definitions/uint32 > + maxItems: 1 > + description: | > + HW index to distinguish same functionality modules. > + > + reg: > + description: | > + Physical base address and length of the function block > + register space, the number aligns with the component > + and its own subcomponent. > + > + mediatek,gce-client-reg: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: | > + sub-system id corresponding to the global command engine (GCE) > + register address. > + $ref: /schemas/mailbox/mtk-gce.txt > + > + clocks: > + minItems: 1 > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8183-clk.h> > + #include <dt-bindings/gce/mt8183-gce.h> > + > + mdp3_ccorr: mdp3_ccorr@1401c000 { > + compatible = "mediatek,mt8183-mdp3-ccorr"; > + mediatek,mdp3-id = <0>; > + reg = <0x1401c000 0x1000>; > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; > + clocks = <&mmsys CLK_MM_MDP_CCORR>; > + };
On Tue, 2021-09-07 at 08:11 +0800, Chun-Kuang Hu wrote: > Hi, Moudy: > > Moudy Ho <moudy.ho@mediatek.com> 於 2021年8月24日 週二 下午6:02寫道： > > > > This patch adds DT binding document for Media Data Path 3 (MDP3) > > a unit in multimedia system used for scaling and color format > > convert. > > > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > > --- > > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 > > ++++++++++++++++++ > > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > > 5 files changed, 471 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > > I've compared ccorr driver in display [1] and ccorr in mdp [2], both > are similar. So I would like both binding document are placed > together. In display folder? In mdp folder? In SoC folder? I've no > idea which one is better. At lease put together. > > [1] > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=v5.14__;!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeycP_k2IQ$ > > [2] > https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20210824100027.25989-6-moudy.ho@mediatek.com/__;!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeyTwjz4UU$ > > > Regards, > Chun-Kuang. Hi Chun-Kuang, Thank you for your recommendation. I will integrate the same component binding files in MDP and DISP, and place them in the folder same with MMSYS instead. ( https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml ) The first version of RDMA, CCORR, AAL, COLOR and WDMA will be provided by MDP and then DISP add it own property later. Thanks & Regards, Moudy Ho > > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml > > create mode 100644 > > Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml > > > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml > > new file mode 100644 > > index 000000000000..59fd68b46022 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3- > > ccorr.yaml > > @@ -0,0 +1,57 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: > > https://urldefense.com/v3/__http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml*__;Iw!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeyW4MmXUY$ > > > > +$schema: > > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!xOYd8SaiDSRvJBgpaQpLzMxqPOAstMX7cGXkhEnuYa1Wb3EMiiElNEPeydwX0gSy$ > > > > + > > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > > + > > +maintainers: > > + - Daoyuan Huang <daoyuan.huang@mediatek.com> > > + - Moudy Ho <moudy.ho@mediatek.com> > > + > > +description: | > > + One of Media Data Path 3 (MDP3) components used to do color > > correction with 3X3 matrix. > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - mediatek,mt8183-mdp3-ccorr > > + > > + mediatek,mdp3-id: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + maxItems: 1 > > + description: | > > + HW index to distinguish same functionality modules. > > + > > + reg: > > + description: | > > + Physical base address and length of the function block > > + register space, the number aligns with the component > > + and its own subcomponent. > > + > > + mediatek,gce-client-reg: > > + $ref: /schemas/types.yaml#/definitions/phandle-array > > + description: | > > + sub-system id corresponding to the global command engine > > (GCE) > > + register address. > > + $ref: /schemas/mailbox/mtk-gce.txt > > + > > + clocks: > > + minItems: 1 > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/mt8183-clk.h> > > + #include <dt-bindings/gce/mt8183-gce.h> > > + > > + mdp3_ccorr: mdp3_ccorr@1401c000 { > > + compatible = "mediatek,mt8183-mdp3-ccorr"; > > + mediatek,mdp3-id = <0>; > > + reg = <0x1401c000 0x1000>; > > + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 > > 0x1000>; > > + clocks = <&mmsys CLK_MM_MDP_CCORR>; > > + };
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml new file mode 100644 index 000000000000..59fd68b46022 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings + +maintainers: + - Daoyuan Huang <daoyuan.huang@mediatek.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to do color correction with 3X3 matrix. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-ccorr + + mediatek,mdp3-id: + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + description: | + HW index to distinguish same functionality modules. + + reg: + description: | + Physical base address and length of the function block + register space, the number aligns with the component + and its own subcomponent. + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + + clocks: + minItems: 1 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + + mdp3_ccorr: mdp3_ccorr@1401c000 { + compatible = "mediatek,mt8183-mdp3-ccorr"; + mediatek,mdp3-id = <0>; + reg = <0x1401c000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xc000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_CCORR>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml new file mode 100644 index 000000000000..b355d7fe791e --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml @@ -0,0 +1,207 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Media Data Path 3 Device Tree Bindings + +maintainers: + - Daoyuan Huang <daoyuan.huang@mediatek.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to do read DMA. + RDMA0 is also used to be a controller node containing MMSYS, + MUTEX, GCE and SCP settings. + +properties: + compatible: + oneOf: + - items: + - enum: + # controller node + - mediatek,mt8183-mdp3 + - enum: + - mediatek,mt8183-mdp3-rdma + + - items: + - enum: + # read DMA + - mediatek,mt8183-mdp3-rdma + + mediatek,scp: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: | + The node of system control processor (SCP), using + the remoteproc & rpmsg framework. + $ref: /schemas/remoteproc/mtk,scp.yaml + + mediatek,mdp3-id: + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + description: | + In MDP3, it can allocate multiple identical modules for + different data path selection or multi-pipeline execution. + This node is used to indicate the ID of each module. + + mdp3-comps: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - enum: + # MDP direct-link input path selection, create a + # component for path connectedness of HW pipe control + - mediatek,mt8183-mdp3-dl1 + - enum: + - mediatek,mt8183-mdp3-dl2 + - enum: + # MDP direct-link output path selection, create a + # component for path connectedness of HW pipe control + - mediatek,mt8183-mdp3-path1 + - enum: + - mediatek,mt8183-mdp3-path2 + - enum: + # Input DMA of ISP PASS2 (DIP) module for raw image input + - mediatek,mt8183-mdp3-imgi + - enum: + # Output DMA of ISP PASS2 (DIP) module for YUV image output + - mediatek,mt8183-mdp3-exto + + mdp3-comp-ids: + maxItems: 1 + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Pipeline ID of MDP direct-link or DIP. + + reg: + description: | + Physical base address and length of the function block + register space, the number aligns with the component + and its own subcomponent. + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 6 + + iommus: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Should point to the respective IOMMU block with master + port as argument. + $ref: /schemas/iommu/mediatek,iommu.yaml + + mediatek,mmsys: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: | + The node of mux(multiplexer) controller for HW connections. + + mediatek,mm-mutex: + $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 + description: | + The node of sof(start of frame) signal controller. + + mediatek,mailbox-gce: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + The node of global command engine (GCE), used to read/write + registers with critical time limitation. + $ref: /schemas/mailbox/mtk-gce.txt + + mboxes: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + $ref: /schemas/mailbox/mailbox.txt + + gce-subsys: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + +if: + properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3 + - enum: + - mediatek,mt8183-mdp3-rdma + +then: + required: + - mediatek,scp + - mediatek,mmsys + - mediatek,mm-mutex + - mediatek,mailbox-gce + - mboxes + - gce-subsys + +required: + - compatible + - mediatek,mdp3-id + - reg + - clocks + - mediatek,gce-client-reg + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_rdma0: mdp3_rdma0@14001000 { + compatible = "mediatek,mt8183-mdp3", + "mediatek,mt8183-mdp3-rdma"; + mediatek,scp = <&scp>; + mediatek,mdp3-id = <0>; + mdp3-comps = "mediatek,mt8183-mdp3-dl1", "mediatek,mt8183-mdp3-dl2", + "mediatek,mt8183-mdp3-path1", "mediatek,mt8183-mdp3-path2", + "mediatek,mt8183-mdp3-imgi", "mediatek,mt8183-mdp3-exto"; + mdp3-comp-ids = <0 1 0 1 0 1>; + reg = <0x14001000 0x1000>, + <0x14000000 0x1000>, + <0x14005000 0x1000>, + <0x14006000 0x1000>, + <0x15020000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>, + <&gce SUBSYS_1400XXXX 0 0x1000>, + <&gce SUBSYS_1400XXXX 0x5000 0x1000>, + <&gce SUBSYS_1400XXXX 0x6000 0x1000>, + <&gce SUBSYS_1502XXXX 0 0x1000>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_RDMA0>, + <&mmsys CLK_MM_MDP_RSZ1>, + <&mmsys CLK_MM_MDP_DL_TXCK>, + <&mmsys CLK_MM_MDP_DL_RX>, + <&mmsys CLK_MM_IPU_DL_TXCK>, + <&mmsys CLK_MM_IPU_DL_RX>; + iommus = <&iommu>; + mediatek,mmsys = <&mmsys>; + mediatek,mm-mutex = <&mutex>; + mediatek,mailbox-gce = <&gce>; + mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 21 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 22 CMDQ_THR_PRIO_LOWEST 0>, + <&gce 23 CMDQ_THR_PRIO_LOWEST 0>; + gce-subsys = <&gce 0x14000000 SUBSYS_1400XXXX>, + <&gce 0x14010000 SUBSYS_1401XXXX>, + <&gce 0x14020000 SUBSYS_1402XXXX>, + <&gce 0x15020000 SUBSYS_1502XXXX>; + }; \ No newline at end of file diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml new file mode 100644 index 000000000000..c55a52cd32b7 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Media Data Path 3 Resizer Device Tree Bindings + +maintainers: + - Daoyuan Huang <daoyuan.huang@mediatek.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to do frame resizing. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-rsz + + mediatek,mdp3-id: + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + description: | + HW index to distinguish same functionality modules. + + reg: + description: | + Physical base address and length of the function block + register space, the number aligns with the component + and its own subcomponent. + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + + clocks: + minItems: 1 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + + mdp3_rsz0: mdp3_rsz0@14003000 { + compatible = "mediatek,mt8183-mdp3-rsz"; + mediatek,mdp3-id = <0>; + reg = <0x14003000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ0>; + }; + + mdp3_rsz1: mdp3_rsz1@14004000 { + compatible = "mediatek,mt8183-mdp3-rsz"; + mediatek,mdp3-id = <1>; + reg = <0x14004000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>; + clocks = <&mmsys CLK_MM_MDP_RSZ1>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml new file mode 100644 index 000000000000..93e6f331ada8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-wdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Media Data Path 3 Device Tree Bindings + +maintainers: + - Daoyuan Huang <daoyuan.huang@mediatek.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to write DMA. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-wdma + + mediatek,mdp3-id: + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + description: | + HW index to distinguish same functionality modules. + + reg: + description: | + Physical base address and length of the function block + register space, the number aligns with the component + and its own subcomponent. + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + + iommus: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Should point to the respective IOMMU block with master + port as argument. + $ref: /schemas/iommu/mediatek,iommu.yaml + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_wdma: mdp3_wdma@14006000 { + compatible = "mediatek,mt8183-mdp3-wdma"; + mediatek,mdp3-id = <0>; + reg = <0x14006000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WDMA0>; + iommus = <&iommu>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml new file mode 100644 index 000000000000..2993da04c562 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Media Data Path 3 Device Tree Bindings + +maintainers: + - Daoyuan Huang <daoyuan.huang@mediatek.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: | + One of Media Data Path 3 (MDP3) components used to write DMA with frame rotation. + +properties: + compatible: + items: + - enum: + - mediatek,mt8183-mdp3-wrot + + mediatek,mdp3-id: + $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + description: | + HW index to distinguish same functionality modules. + + reg: + description: | + Physical base address and length of the function block + register space, the number aligns with the component + and its own subcomponent. + + mediatek,gce-client-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + sub-system id corresponding to the global command engine (GCE) + register address. + $ref: /schemas/mailbox/mtk-gce.txt + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + + iommus: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + Should point to the respective IOMMU block with master + port as argument. + $ref: /schemas/iommu/mediatek,iommu.yaml + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8183-clk.h> + #include <dt-bindings/gce/mt8183-gce.h> + #include <dt-bindings/power/mt8183-power.h> + #include <dt-bindings/memory/mt8183-larb-port.h> + + mdp3_wrot0: mdp3_wrot0@14005000 { + compatible = "mediatek,mt8183-mdp3-wrot"; + mediatek,mdp3-id = <0>; + reg = <0x14005000 0x1000>; + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>; + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; + clocks = <&mmsys CLK_MM_MDP_WROT0>; + iommus = <&iommu>; + };
This patch adds DT binding document for Media Data Path 3 (MDP3) a unit in multimedia system used for scaling and color format convert. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> --- .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ .../bindings/media/mediatek,mdp3-rdma.yaml | 207 ++++++++++++++++++ .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ 5 files changed, 471 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wdma.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml